ISP1760BEGA STEricsson, ISP1760BEGA Datasheet - Page 47

• Manufacturer Part Number: ISP1760BEGA
• Manufacturer: STEricsson

Specifications of ISP1760BEGA

• Package Type: LQFP
• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

Table 49.
[1]
CD00222702
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
Force Port Enable register (address 0018h) bit allocation
8.3.11 Edge Interrupt Count register
31
23
15
R
R
R
R
0
0
0
7
0
reserved
The bit description of the register is given in
Table 50.
Table 51
Bit
31 to 6
5 to 4
3 to 2
1 to 0
[1]
30
22
14
R
R
R
R
0
0
0
6
0
shows the bit allocation of the register.
Symbol
-
PORT3_EN[1:0]
PORT2_EN[1:0]
PORT1_EN[1:0]
Force Port Enable register (address 0018h) bit description
R/W
29
21
13
PORT3_EN[1:0]
R
R
R
0
0
0
5
0
Rev. 08 — 13 April 2010
Description
reserved
00 — Normal operation
01 — Port forced to the low-speed enabled state
10 — Port forced to the full-speed enabled state
11 — Port forced to the high-speed enabled state
00 — Normal operation
01 — Port forced to the low-speed enabled state
10 — Port forced to the full-speed enabled state
11 — Port forced to the high-speed enabled state
00 — Normal operation
01 — Port forced to the low-speed enabled state
10 — Port forced to the full-speed enabled state
11 — Port forced to the high-speed enabled state
R/W
28
20
12
R
R
R
0
0
0
4
0
reserved
reserved
reserved
[1]
[1]
[1]
R/W
Table
27
19
11
PORT2_EN[1:0]
R
R
R
0
0
0
3
0
Embedded Hi-Speed USB host controller
49.
R/W
26
18
10
R
R
R
0
0
0
2
0
© ST-ERICSSON 2010. All rights reserved.
R/W
25
17
PORT1_EN[1:0]
R
R
R
0
0
9
0
1
0
ISP1760
R/W
47 of 105
24
16
R
R
R
0
0
8
0
0
0