ISP1760BEGA STEricsson, ISP1760BEGA Datasheet - Page 60

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ISP1760BEGA

Manufacturer Part Number
ISP1760BEGA
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1760BEGA

Package Type
LQFP
Pin Count
128
Lead Free Status / RoHS Status
Compliant

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Table 70.
CD00222702
Product data sheet
Bit
DW7
63 to 32
DW6
31 to 0
DW5
63 to 32
DW4
31 to 0
DW3
63
62
61
60
59
58
57
56 to 55
54 to 51
Symbol
reserved
reserved
reserved
reserved
A
H
B
X
reserved
P
DT
Cerr[1:0]
NakCnt[3:0]
High-speed bulk IN and OUT: bit description
Access
-
-
-
-
SW — sets
HW — resets
HW — writes
HW — writes
HW — writes
SW — writes
-
SW — writes
HW — updates
HW — updates
SW — writes
HW — writes
SW — writes
HW — writes
SW — writes
Value Description
-
-
-
0
-
-
-
-
-
-
-
-
-
-
Rev. 08 — 13 April 2010
-
-
-
not applicable
Active: Write the same value as that in V.
Halt: This bit corresponds to the Halt bit of the Status field of TD.
Babble: This bit corresponds to the Babble Detected bit in the
Status field of iTD, siTD or TD.
1 — When babbling is detected, A and V are set to 0.
Error: This bit corresponds to the Transaction Error bit in the Status
field of iTD, siTD or TD (Exec_Trans, the signal name is xacterr).
0 — No PID error.
1 — If there are PID errors, this bit is set active. The A and V bits are
also set to inactive. This transaction is retried three times.
0 — Before scheduling.
-
Ping: For high-speed transactions, this bit corresponds to the Ping
state bit in the Status field of a TD.
0 — Ping is not set.
1 — Ping is set.
For the first time, software sets the Ping bit to 0. For the successive
asynchronous TD, software sets the bit in asynchronous TD based
on the state of the bit for the previous asynchronous TD of the same
transfer, that is:
Data Toggle: This bit is filled by software to start a PTD. If
NrBytesToTransfer[14:0] is not complete, software needs to read
this value and then write back the same value to continue.
Error Counter: This field corresponds to the Cerr[1:0] field in TD.
The default value of this field is zero for isochronous transactions.
00 — The transaction will not retry.
11 — The transaction will retry three times. Hardware will decrement
these values.
NAK Counter: This field corresponds to the NakCnt field in TD.
Software writes for the initial PTD launch. The V bit is reset if NakCnt
decrements to zero and RL is a nonzero value. It reloads from RL if
transaction is ACK-ed.
The current asynchronous TD is completed with the Ping bit
set.
The next asynchronous TD will have its Ping bit set by the
software.
Embedded Hi-Speed USB host controller
© ST-ERICSSON 2010. All rights reserved.
ISP1760
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