STPCC5HEBC STMicroelectronics, STPCC5HEBC Datasheet - Page 75

• Manufacturer Part Number: STPCC5HEBC
• Description: IC SYSTEM-ON-CHIP X86 388-PBGA
• Manufacturer: STMicroelectronics
• Series: -r

Specifications of STPCC5HEBC

• Applications: Set-Top Boxes, TV
• Core Processor: x86
• Program Memory Type: External Program Memory
• Controller Series: STPC® Consumer-II
• Ram Size: External
• Interface: EBI/EMI, I²C, IDE, ISA, Local Bus
• Number Of I /o: -
• Voltage - Supply: 2.45 V ~ 3.6 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Not Compliant

6.3.10. TV INTERFACE
The STPC integrates a voltage reference and
video DACs. The amount of external devices is
then limited to video buffers as described in the
Figure
The connection from IREFx and VREFx up to the
20 ohms resistors must be as short as possible.
The constraint is the same for the connection from
Figure 6-15. Typical VGA implementation
R,G,B,CVBS outputs:
. Iout
. R
. Vout = {10-bit code} x R
load
VDDA_TV
VSSA_TV
max
= 274 ohms
6-15.
GREEN
VREF1
VREF2
IREF1
IREF2
CVBS
DCLK
BLUE
= 80.704 / R
RED
20 1%
as for
same
RED
100nF 22uF
ref
AGND
GND
< 5mA
load
AGND
AGND
x 0.079 / R
526
1%
FBEAD
AGND
33
2.5V
15uH
47pF
AGND
Release 1.5 - January 29, 2002
R
ref
ref
27MHz
= 20K 1%
GND
326
1%
1%
10
TSH74
AGND
GND
VDDA_TV and VSSA_TV up to the decoupling
capacitances.
The resistors and capacitors of the amplifier stage
have to be as close as possible to the video buffer.
When the TV interface is not needed, the signals
RED, GREEN, BLUE, CVBS, IREF1, IREF2 can
be left unconnected, VDDA_TV must then be
connected to GND.
Fine tuning of the maximum output level must be
done using the gain control registers 0x11 to 0x13
of the integrated Digital Encoder (write the value
0x0B for a gain of 109%).
478 1%
316 1%
100nF
10nF
VCCA
AGND
FBEAD
3.3V
AGND
AGND
VCCA
75 1%
100nF 22uF
DESIGN GUIDELINES
To the connector
FBEAD
FBEAD
5V
GND
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