82V3280EQG IDT, Integrated Device Technology Inc, 82V3280EQG Datasheet - Page 111

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82V3280EQG

Manufacturer Part Number
82V3280EQG
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 82V3280EQG

Function
Wan PLL
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
TQFP
Pin Count
100
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
82V3280EQG
Manufacturer:
IDT
Quantity:
20 000
IN5_IN6_STS - Input Clock 5 & 6 Status
Programming Information
IDT82V3280
Address: 45H
Type: Read
Default Value: X110X110
Bit
7
6
5
4
3
2
1
0
7
-
IN6_FREQ_HAR
IN6_NO_ACTIVITY_ALARM
IN5_NO_ACTIVITY_ALARM
IN6_FREQ_HARD_ALARM
IN5_FREQ_HARD_ALARM
D_ALARM
IN6_PH_LOCK_ALARM
IN5_PH_LOCK_ALARM
6
Name
-
-
IN6_NO_ACTIVI
TY_ALARM
5
Reserved.
This bit indicates whether IN6 is in frequency hard alarm status.
0: No frequency hard alarm.
1: In frequency hard alarm status. (default)
This bit indicates whether IN6 is in no-activity alarm status.
0: No no-activity alarm.
1: In no-activity alarm status. (default)
This bit indicates whether IN6 is in phase lock alarm status.
0: No phase lock alarm. (default)
1: In phase lock alarm status.
If the PH_ALARM_TIMEOUT bit (b5, 09H) is ‘0’, this bit is cleared by writing ‘1’ to this bit; if the
PH_ALARM_TIMEOUT bit (b5, 09H) is ‘1’, this bit is cleared after a period ( = TIME_OUT_VALUE[5:0] (b5~0,
08H) X MULTI_FACTOR[1:0] (b7~6, 08H) in second ) which starts from when the alarm is raised.
Reserved.
This bit indicates whether IN5 is in frequency hard alarm status.
0: No frequency hard alarm.
1: In frequency hard alarm status. (default)
This bit indicates whether IN5 is in no-activity alarm status.
0: No no-activity alarm.
1: In no-activity alarm status. (default)
This bit indicates whether IN5 is in phase lock alarm status.
0: No phase lock alarm. (default)
1: In phase lock alarm status.
If the PH_ALARM_TIMEOUT bit (b5, 09H) is ‘0’, this bit is cleared by writing ‘1’ to this bit; if the
PH_ALARM_TIMEOUT bit (b5, 09H) is ‘1’, this bit is cleared after a period ( = TIME_OUT_VALUE[5:0] (b5~0,
08H) X MULTI_FACTOR[1:0] (b7~6, 08H) in second ) which starts from when the alarm is raised.
IN6_PH_LOCK_
ALARM
4
111
3
-
IN5_FREQ_HAR
Description
D_ALARM
2
IN5_NO_ACTIVI
TY_ALARM
1
December 9, 2008
IN5_PH_LOCK_
ALARM
0
WAN PLL

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