MPC8309VMAHFCA Freescale Semiconductor, MPC8309VMAHFCA Datasheet - Page 7

• Manufacturer Part Number: MPC8309VMAHFCA
• Description: 417/333/233 MP Std Tmp
• Manufacturer: Freescale Semiconductor

Specifications of MPC8309VMAHFCA

• Processor Series: MPC8309
• Core: e300c3
• Data Bus Width: 32 bit
• Data Ram Size: 512 MB
• Interface Type: USB, CAN, UART, PCI
• Maximum Clock Frequency: 417 MHz
• Number Of Programmable I/os: 56
• Operating Supply Voltage: - 0.3 V to + 1.26 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Operating Temperature Range: 0 C to + 105 C
• Processor To Be Evaluated: MPC8309
• Supply Current (max): 5 uA
• Lead Free Status / Rohs Status: Details

Freescale Semiconductor
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MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 1
IO Sequencer
Direct memory access (DMA) controller (DMA Engine 2)
— Four independent fully programmable DMA channels
— Concurrent execution across multiple channels with programmable bandwidth control
— Misaligned transfer capability for source/destination address
— Data chaining and direct mode
— Interrupt on completed segment, error, and chain
DUART
— Supports 2 DUART
— Each has two 2-wire interfaces (RxD, TxD)
— Programming model compatible with the original 16450 UART and the PC16550D
Serial peripheral interface (SPI)
— Master or slave support
Power managemnt controller (PMC)
— Supports core doze/nap/sleep/ power management
— Exits low power state and returns to full-on mode when
Parallel I/O
— General-purpose I/O (GPIO)
System timers
— Periodic interrupt timer
— Software watchdog timer
— Eight general-purpose timers
Real time clock (RTC) module
— Maintains a one-second count, unique over a period of thousands of years
— Two possible clock sources:
IEEE Std. 1149.1™ compliant JTAG boundary scan
– The same can be configured as one 4-wire interface (RxD, TxD, RTS, CTS)
– The core internal time base unit invokes a request to exit low power state
– The power management controller detects that the system is not idle and there are
– 56 parallel I/O pins multiplexed on various chip interfaces
– Interrupt capability
– External RTC clock (RTC_PIT_CLK)
– CSB bus clock
outstanding transactions on the internal bus or an external interrupt.
Overview
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