EP3C25F256C7N Altera, EP3C25F256C7N Datasheet - Page 224

• Manufacturer Part Number: EP3C25F256C7N
• Description: IC CYCLONE III FPGA 256-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C25F256C7N

• Number Of Logic Elements/cells: 24624
• Number Of Labs/clbs: 1539
• Total Ram Bits: 608256
• Number Of I /o: 156
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 256-FBGA
• Family Name: Cyclone III
• Number Of Logic Blocks/elements: 24624
• # I/os (max): 156
• Frequency (max): 437.5MHz
• Process Technology: 65nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 24624
• Ram Bits: 608256
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: FBGA
• For Use With: 544-2370 - KIT STARTER CYCLONE III EP3C25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: Q4433068

9–64
Table 9–20. JTAG Programming Instruction Flows
Cyclone III Device Handbook, Volume 1
FACTORY
ACTIVE_DISENGAGE
CONFIG_IO
Other JTAG instructions
JTAG_PROGRAM
CHECK_STATUS
JTAG_STARTUP
JTAG TAP Reset/ other instruction
Notes to
(1) “R” indicates that the instruction is required to be executed before the next instruction, “O” indicates the optional instruction, “Rc” indicates
(2) AP configuration is for Cyclone III devices only.
the recommended instruction, and “NA” indicates that the instruction is not allowed to be executed in this mode.
Table
JTAG Instruction
9–20:
ACTIVE_DISENGAGE
The ACTIVE_DISENGAGE instruction places the active configuration controller (AS
and AP) into an idle state prior to JTAG programming. The active configuration
controller is the AS controller when the MSEL pins are set to AS configuration scheme
and the AP controller when the MSEL pins are set to the AP configuration scheme.
The two purposes of placing the active controllers in an idle state are:
■
■
The ACTIVE_DISENGAGE instruction is required before JTAG programming
regardless of the current state of the Cyclone III device family if the MSEL pins are set
to an active configuration scheme (AS or AP). If the ACTIVE_DISENGAGE instruction
is issued during a passive configuration scheme (PS or FPP), it has no effect on the
Cyclone III device family. Similarly, the CONFIG_IO instruction is issued after an
ACTIVE_DISENGAGE instruction, but is no longer required to properly halt
configuration.
for each configuration mode. The ordering of the required instructions is a hard
requirement and must be met to ensure functionality.
In AS or AP configuration schemes, the ACTIVE_DISENGAGE instruction puts the
active configuration controllers into idle state. If a successful JTAG programming is
executed, the active controllers are automatically re-engaged after user mode is
reached using JTAG programming. This causes the active controllers to transition to
their respective user mode states.
To ensure that they are not trying to configure the device in their respective
configuration modes during JTAG programming
To allow the controllers to properly recognize a successful JTAG programming
that results in the device reaching user mode
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
Table 9–20
NA
PS
Rc
Rc
O
O
R
R
R
Prior to User Mode
Configuration Scheme and Current State of the Cyclone III Device
Configuration)
(Interrupting
FPP
(Note 1)
NA
Rc
Rc
lists the required, recommended, and optional instructions
O
O
R
R
R
NA
AS
Rc
R
O
O
R
R
R
(2)
NA
AP
Rc
R
O
O
R
R
R
NA
PS
Rc
O
O
O
R
R
R
User Mode
FPP
NA
Rc
O
O
O
R
R
R
NA
AS
Rc
O
O
O
R
R
R
© December 2009 Altera Corporation
(2)
NA
AP
Rc
R
O
O
R
R
R
NA
PS
Rc
R
O
O
R
R
R
Configuration Features
FPP
Power Up
NA
Rc
R
O
O
R
R
R
NA
AS
Rc
R
R
O
R
R
R
AP(
NA
NA
Rc
2)
R
O
R
R
R