MPC8308CVMAFD Freescale Semiconductor, MPC8308CVMAFD Datasheet - Page 45

• Manufacturer Part Number: MPC8308CVMAFD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8308CVMAFD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 333MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 333 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Core Size: 32 Bit
• Cpu Speed: 333MHz
• Digital Ic Case Style: MAPBGA
• No. Of Pins: 473
• Operating Temperature Range: -40°C To +105°C
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 30
Freescale Semiconductor
Local bus clock to output valid (Note: to be revisited)
Local bus clock to output high impedance for LD (Note: to be
revisited)
Notes:
1. The symbols used for timing specifications follow the pattern of t
2. All timings are in reference to falling edge of LCLK0 (for all outputs and for LGTA and LUPWAIT inputs) or rising edge of
3. All signals are measured from NV
4. Input timings are measured at the pin.
5. For purposes of active/float timing measurements, the Hi-Z or off state is defined to be when the total current delivered
inputs and t
timing (LB) for the input (I) to go invalid (X) with respect to the time the t
for clock one(1).
LCLK0 (for all other inputs).
signaling levels.
through the component pin is less than or equal to the leakage current specification.
provides the AC test load for the local bus.
(First two letters of functional block)(reference)(state)(signal)(state)
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 2
Parameter
Output
Table 37. Local Bus General Timing Parameters (continued)
DD
/2 of the rising/falling edge of LCLK0 to 0.4 × NV
Figure 30. Local Bus AC Test Load
Z
0
= 50 Ω
Symbol
t
t
(First two letters of functional block)(signal)(state) (reference)(state)
LBKHOV
LBKHOZ
for outputs. For example, t
1
LBK
R
L
= 50 Ω
clock reference (K) goes high (H), in this case
Min
—
—
DD
of the signal in question for 3.3-V
NV
Max
DD
3
4
LBIXKH1
/2
symbolizes local bus
Unit
Enhanced Local Bus
ns
ns
Notes
3
5
for
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