MPC8308CVMAFD Freescale Semiconductor, MPC8308CVMAFD Datasheet - Page 52

• Manufacturer Part Number: MPC8308CVMAFD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8308CVMAFD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 333MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 333 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Core Size: 32 Bit
• Cpu Speed: 333MHz
• Digital Ic Case Style: MAPBGA
• No. Of Pins: 473
• Operating Temperature Range: -40°C To +105°C
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Enhanced Secure Digital Host Controller (eSDHC)
At recommended operating conditions NV
Figure 37
52
SD Card Output Valid
SD Card Output Hold
Notes:
1
2
3
The symbols used for timing specifications herein follow the pattern of t
for inputs and t
full mode speed device timing (SFS) input (I) to go invalid (X) with respect to the clock reference (K) going to high (H). Also
t
going valid (V) or data output valid time. Note that, in general, the clock reference symbol representation is based on five
letters representing the clock of a particular functional. For rise and fall times, the latter convention is used with the appropriate
letter: R (rise) or F (fall).
Measured at capacitive load of 40 pF.
For reference only, according to the SD card specifications.
SFSKHOV
provides the eSDHC clock input timing diagram.
symbolizes eSDHC full speed timing (SFS) for the clock reference (K) to go high (H), with respect to the output (O)
operational mode
External Clock
(first three letters of functional block)(reference)(state)(signal)(state)
Table 40. eSDHC AC Timing Specifications for High Speed Mode (continued)
eSDHC
Parameter
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 2
Figure 37. eSDHC Clock Input Timing Diagram
DD
= 3.3 V ± 300 mV.
VM
VM = Midpoint Voltage (NVDD/2)
t
SHSCK
VM
Symbol
t
ODLY
VM
t
OH
(first three letters of functional block)(signal)(state) (reference)(state)
for outputs. For example, t
1
t
Min
SHSCK
2.5
—
t
SHSCKR
L
Max
t
SHSCKH
14
—
SFSIXKH
t
SHSCKF
Freescale Semiconductor
symbolizes eSDHC
Unit
ns
ns
Notes
3
3