DP83907VF National Semiconductor, DP83907VF Datasheet - Page 2

• Manufacturer Part Number: DP83907VF
• Description: IC CONTROLLR AT/LANII TP 160PQFP
• Manufacturer: National Semiconductor

Specifications of DP83907VF

• Controller Type: Network Interface Controller (NIC)
• Interface: Twisted Pair
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 150mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-MQFP, 160-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP83907VF

General Description
The integrated ENDEC module allows Manchester encod-
ing and decoding via a differential transceiver and phase
lock loop decoder at 10 Mbit sec Also included are a colli-
sion detect translator and diagnostic loopback capability
The ENDEC module interfaces directly to the transceiver
module and also provides a fully IEEE compliant AUI (At-
tachment Unit Interface) for connection to other media
transceivers
The Media Access Control function which is provided by the
Network Interface Control module (NIC) provides simple
and efficient packet transmission and reception control by
means of off-board memory which can be accessed through
an I O port
The DP83907 provides a comprehensive solution for
10BASE-T IEEE 802 3 networks Due to the inherent con-
straints of CMOS processing isolation is required at the AUI
differential signal interface for 10BASE5 and 10BASE2 ap-
plications
(Continued)
2
TabIe Of Contents
1 0 SYSTEM DIAGRAM
2 0 PIN DESCRIPTION
3 0 SIMPLIFIED APPLICATION DIAGRAM
4 0 FUNCTIONAL DESCRIPTION
5 0 REGISTER DESCRIPTIONS
6 0 OPERATION OF DP83907
7 0 IN-CIRCUIT TEST (ICT) DESCRIPTION
1 1 Connection Diagram
4 1 Bus Interface Block
4 2 Power on RESET Operation
4 3 EEPROM OperatIon
4 4 Jumperless Operation Support
4 5 Ethernet Cable Configuratlon
4 6 Interrupt AND LED OperatIon
4 7 Boot PROM OperatIon
4 8 DP8390 Core (Network interface Controller)
4 9 Twisted Pair Interface Module
4 10 Encoder Decoder (ENDEC) Module
5 1 Configuration Registers
5 2 NIC Core Registers
5 3 DP8390 Core DMA Registers
6 1 Transmit Receive Packet Encapsulation Decapsula-
6 2 Buffer Memory Access Control (DMA)
6 3 Packet Reception
6 4 Packet TransmissIon
6 5 Loopback DIagnostics
6 6 Memory Arbitration and Bus Operation
6 7 Functional Bus TimIng
tion