DP83907VF National Semiconductor, DP83907VF Datasheet - Page 38

• Manufacturer Part Number: DP83907VF
• Description: IC CONTROLLR AT/LANII TP 160PQFP
• Manufacturer: National Semiconductor

Specifications of DP83907VF

• Controller Type: Network Interface Controller (NIC)
• Interface: Twisted Pair
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 150mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-MQFP, 160-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP83907VF

5 0 Register Descriptions
5 3 DP8390 CORE DMA REGISTERS
The DMA Registers are partitioned into groups Transmit
Receive and Remote DMA Registers The Transmit regis-
ters are used to initialize the Local DMA Channel for trans-
mission of packets while the Receive Registers are used to
initialize the Local DMA Channel for packet Reception The
Page Stop Page Start Current and Boundary Registers are
used by the Buffer Management Logic to supervise the Re-
ceive Buffer Ring The Remote DMA Registers are used to
initialize the Remote DMA
Note In the figure above registers are shown as 8 or 16 bits wide Al-
Transmit DMA Registers
TRANSMIT PAGE START REGISTER (TPSR)
This register points to the assembled packet to be transmit-
ted Only the eight higher order addresses are specified
since all transmit packets are assembled on 256-byte page
though some registers are 16-bit internal registers all registers are
accessed as 8-bit registers Thus the 16-bit Transmit Byte Count
Register is broken into two 8-bit registers TBCR0 TBCR1 Also
TPSR PSTART PST0P CURR and BNRY only check or control the
upper 8 bits of address information on the bus Thus they are shifted
to positions 15-8 in the diagram above
(Continued)
FIGURE 24 DMA Registers
38
boundaries The bit assignment is shown below The values
placed in bits D7-D0 will be used to initialize the higher order
address (A8-A15) of the Local DMA for transmission The
lower order bits (A7– A0) are initialized to zero
Bit Assignment
TRANSMIT BYTE COUNT REGISTER 0 1 (TBCR0
TBCR1)
These two registers indicate the length of the packet to be
transmitted in bytes The count must include the number of
bytes in the source destination length and data fields The
maximum number of transmit bytes allowed is 64K bytes
The DP83907 will not truncate transmissions longer than
1500 bytes The bit assignment is shown below
TPSR
TBCR1
TBCR0
A15
(A7–A0 Initialized to 0)
7
L15
L7
7
7
A14
6
L14
L6
6
6
A13
L13
5
L5
5
5
A12
L12
4
L4
4
4
A11
L11
3
L3
TL F 12082– 19
3
3
A10
L10
2
L2
2
2
A9
L9
L1
1
1
1
A8
L8
L0
0
0
0