ICS1893Y-10LFT IDT, Integrated Device Technology Inc, ICS1893Y-10LFT Datasheet - Page 97

• Manufacturer Part Number: ICS1893Y-10LFT
• Description: PHYCEIVER LOW PWR 3.3V 64-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: PHYceiver™r
• Type: PHY Transceiverr

Specifications of ICS1893Y-10LFT

• Protocol: MII
• Voltage - Supply: 3.14 V ~ 3.47 V
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 1893Y-10LFT

7.13 Register 18: 10Base-T Operations Register
7.13.1 Remote Jabber Detect (bit 18.15)
ICS1893Y-10 Rev F 1/20/04
The 10Base-T Operations Register provides an STA with the ability to monitor and control the
ICS1893Y-10 activity while the ICS1893Y-10 is operating in 10Base-T mode.
Note:
1. For an explanation of acronyms used in
2. During any write operation to any bit in this register, the STA must write the default value to all
Table 7-20. 10Base-T Operations Register (register 18 [0x12])
The Remote Jabber Detect bit is provided to indicate that an ICS1893Y-10 port has detected a Jabber
Condition on its receive path. This bit is reset to logic zero on a read of the 10Base-T operations register.
When this bit is logic:
•
•
This bit is a latching high bit. (For more information on latching high and latching low bits, see
7.1.4.1, “Latching High Bits”
Note:
18.15
18.14
18.13
18.12
18.11
18.10
18.9
18.8
18.7
18.6
18.5
18.4
18.3
18.2
18.1
18.0
Bit
Zero, it indicates a Jabber Condition has not occurred on the port’s receive path since either the last read
of this register or the last reset of the associated port.
One, it indicates a Jabber Condition has occurred on the port’s receive path since either the last read of
this register or the last reset of the associated port.
ICS1893Y-10 - Release
Reserved bits.
This bit is provided for information purposes only (that is, no actions are taken by the port). The
ISO/IEC specification defines the Jabber Condition in terms of a port’s transmit path. To set this bit,
an ICS1893Y-10 port monitors its receive path and applies the ISO/IEC Jabber criteria to its
receive path.
Remote Jabber
Detect
Polarity reversed
ICS reserved
ICS reserved
ICS reserved
ICS reserved
ICS reserved
ICS reserved
ICS reserved
ICS reserved
Jabber inhibit
ICS reserved
Auto polarity inhibit
SQE test inhibit
Link Loss inhibit
Squelch inhibit
Definition
No Remote Jabber
Condition detected
Normal polarity
corrected
Normal SQE test behavior
Normal Link Loss behavior Link Always = Link Pass
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Normal Jabber behavior
Read unspecified
Polarity automatically
Normal squelch behavior
and
Copyright © 2004, Integrated Circuit Systems, Inc.
Section 7.1.4.2, “Latching Low
When Bit = 0
All rights reserved.
Table
97
7-20, see
Remote Jabber Condition
Detected
Polarity reversed
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Jabber Check disabled
Read unspecified
Polarity not automatically
corrected
SQE test disabled
No squelch
When Bit = 1
Chapter 1, “Abbreviations and
Bits”.)
Chapter 7 Management Register Set
RW/0
RW/0
RW/0
RW/0
RW/0
RW/0
RW/0
RW/0
RW/1
cess
RW
RW
RW
RW
RW
Ac-
RO
RO
SF
LH
LH
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Acronyms”.
January, 2004
Section
fault
De-
0
0
–
–
–
–
–
–
–
–
0
1
0
0
0
0
Hex
–
–
–
0