PSB3186FV14NT Infineon Technologies, PSB3186FV14NT Datasheet - Page 107

• Manufacturer Part Number: PSB3186FV14NT
• Manufacturer: Infineon Technologies

Specifications of PSB3186FV14NT

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

ISAC-SX TE
PSB 3186
Description of Functional Blocks
Possible Error Conditions During Reception of Frames
If parts of a frame get lost because the receive FIFO is full, the Receive Data Overflow
(RDO) byte in the RSTAD byte will be set. If a complete frame is lost, i.e. if the FIFO is
full when a new frame is received, the receiver will assert a Receive Frame Overflow
(RFO) interrupt.
The microcontroller sees a cyclic buffer, i.e. if it tries to read more data than available, it
reads the same data again and again. On the other hand, if it doesn’t read or doesn’t
want to read all data, they are deleted anyway after the RMC command.
If the microcontroller reads data without a prior RME or RPF interrupt, the content of the
RFIFOD would not be corrupted, but new data is only transferred to the host as long as
new valid data is available in the RFIFOD, otherwise the last data is read again and
again.
The general procedures for a data reception sequence are outlined in the flow diagram
in
Figure
61.
Data Sheet
107
2003-01-30