PSB3186FV14NT Infineon Technologies, PSB3186FV14NT Datasheet - Page 157

• Manufacturer Part Number: PSB3186FV14NT
• Manufacturer: Infineon Technologies

Specifications of PSB3186FV14NT

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

IOM_CR
ENS_TSS ... Enable Serial Data Strobe of timeslot TSS
ENS_TSS+1 ... Enable Serial Data Strobe of timeslot TSS+1
0: The serial data strobe signal SDSx is inactive during TSS, TSS+1
1: The serial data strobe signal SDSx is active during TSS, TSS+1
ENS_TSS+3 ... Enable Serial Data Strobe of timeslot TSS+3 (D-Channel)
0: The serial data strobe signal SDSx is inactive during the D-channel (bit7, 6) of TSS+3
1: The serial data strobe signal SDSx is active during the D-channel (bit7, 6) of TSS+3
TSS ... Timeslot Selection
Selects one of 32 timeslots on the IOM-2 interface (with respect to FSC) during which
SDSx
SDS_CONF.SDS_BCL). The data strobe signal allows standard data devices to access
a programmable channel.
4.3.8
Value after reset: 08
SPU ... Software Power Up
0: The DU line is normally used for transmitting data
1: Setting this bit to ’1’ will pull the DU line to low. This will enforce connected layer 1
devices to deliver IOM-clocking.
After a subsequent ISTA.CIC-interrupt (C/I-code change) and reception of the C/I-code
”PU” (Power Up indication in TE-mode) the microcontroller writes an AR or TIM
command as C/I-code in the CIX0-register, resets the SPU bit and waits for the following
CIC-interrupt.
For general information please refer to
CI_CS ... C/I Channel Selection
The channel selection for D-channel and C/I-channel is done in the channel select bits
CH2-0 of register TR_CR (for the transceiver) and DCI_CR (for the D-channel controller
and C/I-channel controller).
Data Sheet
is
7
IOM_CR - Control Register IOM Data
SPU
active
H
high
0
CI_CS TIC_
or
provides
DIS
Chapter
157
EN_
BCL
a
3.7.6.
strobed
CLKM DIS_
Detailed Register Description
BCL
OD
0
clock
DIS_
IOM
ISAC-SX TE
output
RD/WR (57)
PSB 3186
2003-01-30
(see