PSB3186FV14NT Infineon Technologies, PSB3186FV14NT Datasheet - Page 86

• Manufacturer Part Number: PSB3186FV14NT
• Manufacturer: Infineon Technologies

Specifications of PSB3186FV14NT

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

3.7.3.1
The MONITOR channel operates on an asynchronous basis. While data transfers on the
bus take place synchronized to frame sync, the flow of data is controlled by a handshake
procedure using the MONITOR Channel Receive (MR) and MONITOR Channel
Transmit (MX) bits. Data is placed onto the MONITOR channel and the MX bit is
activated. This data will be transmitted once per 8-kHz frame until the transfer is
acknowledged via the MR bit.
The MONITOR channel protocol is described in the following section and
illustrates this. The relevant control and status bits for transmission and reception are
listed in
Table 12
Control/
Status Bit
Control
Status
Table 13
Control/
Status Bit
Control
Status
Data Sheet
Table 12
Handshake Procedure
MOSR
MOSR
Register
MOCR
MSTA
Register
MOCR
Transmit Direction
Receive Direction
and
Table
Bit
MXC
MIE
MDA
MAB
MAC
Bit
MRC
MRE
MDR
MER
13.
Function
Transmit Interrupt Enable
Data Acknowledged
Data Abort
Transmission Active
Function
MR Bit Control
Receive Interrupt Enable
Data Received
End of Reception
MX Bit Control
86
Description of Functional Blocks
ISAC-SX TE
PSB 3186
2003-01-30
Figure 48