PSB3186FV14NT Infineon Technologies, PSB3186FV14NT Datasheet - Page 138

• Manufacturer Part Number: PSB3186FV14NT
• Manufacturer: Infineon Technologies

Specifications of PSB3186FV14NT

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

TEI2
RSTAD
4.1.15
Value after reset: FF
TEI2 ... Terminal Endpoint Identifier
In all message transfer modes except in transparent modes 0, 1 and extended
transparent mode, TEI2 is used by the ISAC-SX TE for address recognition. In the case
of a two-byte address field, it contains the value of the second programmable Terminal
Endpoint Identifier according of the ISDN LAPD-protocol.
In non-auto-modes with one-byte address field, TEI2 is a response address, according
to X.25 LAPD.
EA2 ... Address field Extension bit
This bit is to be set to ’1’ according to HDLC/LAPD.
4.1.16
Value after reset: 0F
For general information please refer to
VFR... Valid Frame
Determines whether a valid frame has been received.
The frame is valid (1) or invalid (0).
A frame is invalid when there is not a multiple of 8 bits between flag and frame end (flag,
abort).
RDO ... Receive Data Overflow
If RDO=1, at least one byte of the frame has been lost, because it could not be stored in
RFIFOD. As opposed to the ISTAD.RFO an RDO indicates that the beginning of a frame
has been received but not all bytes could be stored as the RFIFOD was temporarily full.
Data Sheet
7
7
TEI2 - TEI2 Register
RSTAD - Receive Status Register D-Channel
VFR
RDO
H
H
CRC
TEI2
RAB
Chapter
138
SA1
3.8.
SA0
Detailed Register Description
C/R
0
0
EA2
TA
ISAC-SX TE
PSB 3186
2003-01-30
WR (28)
RD (28)