PEB3086HV14XP Infineon Technologies, PEB3086HV14XP Datasheet - Page 143

• Manufacturer Part Number: PEB3086HV14XP
• Manufacturer: Infineon Technologies

Specifications of PEB3086HV14XP

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Figure 74
that a long frame (68 byte) followed by two short frames (12 byte each) are received. The
FIFO threshold (block size) is set to 32 byte in this example:
• After 32 byte of frame 1 have been received an RPF interrupt is generated to indicate
• The host reads the first data block from RFIFOx and acknowledges the reception by
• The second 32 byte block is indicated by RPF which is read and acknowledged by the
• The reception of the remaining 4 bytes plus RSTAx are indicated by RME (i.e. the
• The host gets the number of bytes (COUNT = 5) from RBCLx/RBCHx and reads out
• The second frame is received and indicated by RME interrupt.
• The host gets the number of bytes (COUNT = 13) from RBCLx/RBCHx and reads out
• The third frame is transferred in the same way.
Figure 74
Data Sheet
Receive
Frame
that a data block can be read from the RFIFOx.
RMC. Meanwhile the second data block is received and stored in RFIFOx.
host as described before.
receive status is always appended to the end of the frame).
the RFIFOx and optionally the status register RSTA. The frame is acknowledged by
RMC.
the RFIFOx and optionally the status register. The RFIFOx is acknowledged by RMC.
32
RPF
gives an example of an interrupt controlled reception sequence, supposed
32 Bytes
RD
Reception Sequence Example
Bytes
32
68
RMC
RPF
4
32 Bytes
Bytes
RD
12
12
RMC
Bytes
12
12
RME
Count
RD
CPU Interface
IOM Interface
*
5 Bytes
1)
143
RD
The last byte contains the receive status information <RSTA>
*
1)
RMC
RME
Description of Functional Blocks
Count
RD
13 Bytes
RD
*
1)
RMC RME
Count
RD
PEB 3086
13 Bytes
2003-01-30
ISAC-SX
RD
*
fifoseq_rec.vsd
1)
RMC