PEB3086HV14XP Infineon Technologies, PEB3086HV14XP Datasheet - Page 216

• Manufacturer Part Number: PEB3086HV14XP
• Manufacturer: Infineon Technologies

Specifications of PEB3086HV14XP

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

ID
SRES
4.5.7
Value after reset: 01
DESIGN ... Design Number
The design number allows to identify different hardware designs of the ISAC-SX by
software.
01
(all other codes reserved)
4.5.8
Value after reset: 00
RES_xx ... Reset Functional Block xx
A reset can be activated on the functional block C/I-handler, B-channel, Monitor channel,
D-channel, IOM handler, S-transceiver and to pin RSTO.
Setting one of these bits to “1” causes the corresponding block to be reset for a duration
of 4 BCL clock cycles, except RES_RSTO which is activated for a duration of
125 ... 250 µs. The bits are automatically reset to “0” again.
Data Sheet
H
: V 1.4
7
7
ID - Identification Register
SRES - Software Reset Register
RES_
CI
0
RES_
BCH
H
H
0
RES_
MON
216
RES_
DCH
DESIGN
RES_
IOM
Detailed Register Description
RES_
TR
0
0
RSTO
RES_
PEB 3086
2003-01-30
ISAC-SX
WR (64)
RD (64)