PEB3086HV14XP Infineon Technologies, PEB3086HV14XP Datasheet - Page 177

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PEB3086HV14XP

Manufacturer Part Number
PEB3086HV14XP
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB3086HV14XP

Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
TMD
CIR0
4.1.17
Value after reset: 00
For general information please refer to
TLP ... Test Loop
The TX path of layer-2 is internally connected with the RX path of layer-2. Data coming
from the layer 1 controller will not be forwarded to the layer 2 controller.
The setting of TLP is only valid if the IOM interface is active.
4.1.18
Value after reset: F3
CODR0 ... C/I Code 0 Receive
Value of the received Command/Indication code. A C/I-code is loaded in CODR0 only
after being the same in two consecutive IOM-frames and the previous code has been
read from CIR0.
CIC0 ... C/I Code 0 Change
A change in the received Command/Indication code has been recognized. This bit is set
only when a new code is detected in two consecutive IOM-frames. It is reset by a read
of CIR0.
CIC1 ... C/I Code 1 Change
A change in the received Command/Indication code in IOM-channel 1 has been
recognized. This bit is set when a new code is detected in one IOM-frame. It is reset by
a read of CIR0.
Data Sheet
7
7
TMD -Test Mode Register D-Channel
CIR0 - Command/Indication Receive 0
0
H
H
0
CODR0
0
0
Chapter
177
CIC0
0
3.9.
CIC1
0
Detailed Register Description
S/G
0
0
0
BAS
TLP
RD/WR (29)
PEB 3086
2003-01-30
ISAC-SX
RD (2E)

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