PEB3086HV14XP Infineon Technologies, PEB3086HV14XP Datasheet - Page 75

• Manufacturer Part Number: PEB3086HV14XP
• Manufacturer: Infineon Technologies

Specifications of PEB3086HV14XP

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Figure 40
3.5.1.2
F3 Pending Deactivation
State after deactivation from the S/T interface by info 0. Note that no activation from the
terminal side is possible starting from this state. A ’DI’ command has to be issued to enter
the state ’Deactivated State’.
F3 Deactivated State
The S/T interface is deactivated and the clocks are deactivated 500 µs after entering this
state and receiving info 0 if the CFS bit of the ISAC-SX Configuration Register is set to
“0“. Activation is possible from the S/T interface and from the IOM-2 interface. The bit
TR_CMD.PD is set and the analog part is powered down.
F3 Power Up
The S/T interface is deactivated (info 0 on the line) and the clocks are running.
F4 Pending Activation
The ISAC-SX transmits info 1 towards the network, waiting for info 2.
F5 Unsynchronized
Data Sheet
TIM
DI
States (TE, LT-T)
Test Mode i
TMA
State Transition Diagram of Unconditional Transitions (TE, LT-T)
it
i
SCP
SSP
SCP
SSP
*
TIM
DI
TIM
DI
Loop A Activated
Loop A Closed
RSY
ARL ARL
AIL
i3
i3
ARL
i3
75
ARL
*
*
i3
Description of Functional Blocks
TIM
DI
RES RES
i0
Reset
State
Any
RES
*
PEB 3086
RST
2003-01-30
ISAC-SX
statem_te_aloop_s.vsd