PSB21150F-V14 Infineon Technologies, PSB21150F-V14 Datasheet - Page 152

PSB21150F-V14

Manufacturer Part Number
PSB21150F-V14
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB21150F-V14

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Supplier Unconfirmed
3.9.2.2
The management of the received HDLC frames as affected by the different operating
modes (see
Figure 82
Data Sheet
MDS2 MDS1 MDS0
Description of Symbols:
0
0
1
1
1
Receive Frame Structure
Chapter
Receive Data Flow
1
1
1
1
0
Compared with registers
(D- or B-channel)
Stored in FIFO/registers
1
0
0
1
1
3.9.1) is shown in
MODE
Non
Auto/16
Non
Auto/8
Transparent 0
Transparent 1
Transparent 2
D-channel
B-channel
D-channel
B-channel
D-channel
B-channel
D-channel
B-channel
FLAG
SAP1
SAP2
SAPG
*2)
RAH1
RAH2
Gr.Adr.
*2)
TEI1
TEI2
*2)
RAL1
RAL2
*2)
SAP1
SAP2
SAPG
*2)
RAH1
RAH2
Gr.Adr.
*2)
ADDRESS
*1) CRC optionally stored in RFIFOx if EXMx:RCRC=1
*2) Address optionally stored in RFIFOx if EXMx:SRA=1
*3) Start of the control field in case of an 8 bit address
*4) Content of RSTA register appended at the frameend into RFIFOx
ADDR
Figure
TEI1
TEI2
TEIG
*2)
RAL1
RAL2
Gr.Adr.
*2)
*3)
*3)
TEI1
TEI2
TEIG
*2)
RAL1
RAL2
*2)
152
_
_
CONTROL DATA
CTRL
82.
Description of Functional Blocks
RFIFOx
RFIFOx
RFIFOx
RFIFOx
RFIFOx
I
STATUS
CRC
*1)
*1)
*1)
*1)
*1)
PSB/PSF 21150
RSTAx
RSTAx
RSTAx
RSTAx
RSTAx
FLAG
21150_13
*4)
*4)
*4)
*4)
*4)
2003-01-30
IPAC-X

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