PSB21150F-V14 Infineon Technologies, PSB21150F-V14 Datasheet - Page 224

PSB21150F-V14

Manufacturer Part Number
PSB21150F-V14
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB21150F-V14

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Supplier Unconfirmed
ID
SRES
INT_POL ... Interrupt Polarity
Selects the polarity of the interrupt pin INT.
0: low active with open drain characteristic (default)
1: high active with push pull characteristic
PPSDX ... Push/Pull Output for SDX (SCI Interface)
0: The SDX pin has open drain characteristic
1: The SDX pin has push/pull characteristic
4.5.7
Value after reset: 01
DESIGN ... Design Number
The design number allows to identify different hardware designs of the IPAC-X by
software.
01
(all other codes reserved)
4.5.8
Value after reset: 00
RES_xx ... Reset Functional Block xx
A reset can be activated on the functional block C/I-handler, B-channel A and B, Monitor
channel, D-channel, IOM handler, S-transceiver and to pin RSTO.
Setting one of these bits to “1” causes the corresponding block to be reset for a duration
of 4 BCL clock cycles, except RES_RSTO which is activated for a duration of
125 ... 250µs. The bits are automatically reset to “0” again.
Data Sheet
H
: V 1.4
7
7
ID - Identification Register
SRES - Software Reset Register
RES_
CI
0
BCHA
RES_
H
H
0
BCHB
RES_
RES_
MON
224
RES_
DCH
DESIGN
RES_
IOM
Detailed Register Description
RES_
TR
0
0
RSTO
RES_
PSB/PSF 21150
2003-01-30
IPAC-X
WR (64)
RD (64)

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