PSB21150F-V14 Infineon Technologies, PSB21150F-V14 Datasheet - Page 29

PSB21150F-V14

Manufacturer Part Number
PSB21150F-V14
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB21150F-V14

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Supplier Unconfirmed
Table 2
Pin No.
MQFP-64
TQFP-64
63
62
61
Data Sheet
Symbol Input (I)
AUX4
AUX5
AUX6
IPAC-X Pin Definitions and Functions (cont’d)
Output (O)
Open Drain
(OD)
I/O (OD)
I/O (OD)
I/O (OD)
Function
• Auxiliary Port 4 (input/output)
This pin is programmable as general input/output.
The state of the pin can be read from (input) / written
to (output) a register.
• MBIT (input/output)
If ACFG2.A4SEL is set to ’1’, pin AUX4 is used as
M-bit input (LT-S / NT / Int. NT mode) or as M-bit
output (TE / LT-T mode) for multiframe
synchronization.
• Auxiliary Port 5 (input/output)
This pin is programmable as general input/output.
The state of the pin can be read from (input) / written
to (output) a register.
• FBOUT - FSC/BCL output
If ACFG2.A5SEL is set to ’1’, pin AUX5 outputs
either an FSC signal or a BCL signal selected via
ACFG2.FBS.
INT0
This pin is programmable as general input/output.
The state of the pin can be read from (input) / written
to (output) a register.
Additionally, as input it can generate a maskable
interrupt to the host, which is either edge or level
triggered. An internal pull up resistor is connected to
this pin (open drain mode only), if push pull
characteristic is selected no pull up is available.
As output an LED can directly be connected to this
pin.
29
Pin Configuration
PSB/PSF 21150
2003-01-30
IPAC-X

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