PSB21150F-V14 Infineon Technologies, PSB21150F-V14 Datasheet - Page 228

• Manufacturer Part Number: PSB21150F-V14
• Manufacturer: Infineon Technologies

Specifications of PSB21150F-V14

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

IPAC-X
PSB/PSF 21150
Detailed Register Description
RACI ... Receiver Active Indication
The B-channel HDLC receiver is active when RACI = ’1’. This bit may be polled. The
RACI bit is set active after a begin flag has been received and is reset after receiving an
abort sequence.
XACI ... Transmitter Active Indication
The B-channel HDLC-transmitter is active when XACI = ’1’. This bit may be polled. The
XACI-bit is active when an XTF-command is issued and the frame has not been
completely transmitted
4.6.4
CMDRB - Command Register B-channels
Value after reset: 00
H
7
0
CMDRB
RMC RRES
0
0
XTF
0
XME XRES
WR (71/81)
RMC ... Receive Message Complete
Reaction to RPF (Receive Pool Full) or RME (Receive Message End) interrupt. By
setting this bit, the microcontroller confirms that it has fetched the data, and indicates that
the corresponding space in the RFIFOB may be released.
RRES ... Receiver Reset
HDLC receiver is reset, the RFIFOB is cleared of any data.
XTF ... Transmit Transparent Frame
After having written up to 32 or 64 bytes (EXMB.XFBS) to the XFIFOB, the
microcontroller initiates the transmission of a transparent frame by setting this bit to ’1’.
The opening flag is automatically added to the message by the IPAC-X.
XME ... Transmit Message End
By setting this bit to ’1’ the microcontroller indicates that the data block written last to the
XFIFOB completes the corresponding frame. The IPAC-X terminates the transmission
by appending the CRC and the closing flag sequence to the data.
XRES ... Transmitter Reset
The B-channel HDLC transmitter is reset and the XFIFOB is cleared of any data. This
command can be used by the microcontroller to abort a frame currently in transmission.
Data Sheet
228
2003-01-30