N25Q064A13EF640F Micron Technology Inc, N25Q064A13EF640F Datasheet - Page 82

• Manufacturer Part Number: N25Q064A13EF640F
• Manufacturer: Micron Technology Inc

Specifications of N25Q064A13EF640F

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Instructions
9.1.27
9.1.28
82/150
S
C
DQ0
S
C
DQ0
DQ1
*Address bit A23 is “Don’t Care.”
Figure 34. Write to Lock Register instruction sequence
Table 20.
1. Values of (b1, b0) after power-up are defined in
Read Flag Status Register
The Read Flag Status Register (RFSR) instruction allows the Flag Status Register to be
read. The Status Register may be read at any time, even while a Program, Erase. When one
of these cycles is in progress, it is recommended to check the P/E Controller bit (Not WIP)
bit before sending a new instruction to the device. It is also possible to read the Flag
Register continuously, as shown here.
Figure 35. Read Flag Status Register instruction sequence
Clear Flag Status Register
The Clear Flag Status Register (CLFSR) instruction reset the error Flag Status Register bits
(Erase Error bit, Program Error bit, VPP Error bit, Protection Error bit). It is not necessary to
set the WEL bit before the Clear Flag Status Register instruction is executed. The WEL bit
will be unchanged after this command is executed.
All sectors
0
0
1
High Impedance
Sector
1
2
Instruction
2
Lock Register in
Instruction
3
3
4
4
5
5
6
6
7
b7-b2
Bit
MSB
b1
b0
23
7
8
7
(1)
22 21
8
9 10
Flag Status Register Out
24-Bit Address*
6
Sector Lock Down bit value (refer to
Sector Write Lock bit value (refer to
9 10 11 12 13 14 15
5
MSB
3
4
28 29 30 31 32 33 34 35
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Section 7: Protection
2
3
1
2
0
1
MSB
7
0
6
7
Flag Status Register Out
Lock Register
5
6
modes.
Value
4
‘0’
5
In
©2010 Micron Technology, Inc. All rights reserved.
3
MSB
36 37 38
4
Table
2
Table
3
1
2
19)
19)
0
39
1
N25Q064 - 3 V
0
Write_LR
7