N25Q064A13EF640F Micron Technology Inc, N25Q064A13EF640F Datasheet - Page 97

• Manufacturer Part Number: N25Q064A13EF640F
• Manufacturer: Micron Technology Inc

Specifications of N25Q064A13EF640F

• Lead Free Status / Rohs Status: Supplier Unconfirmed

N25Q064 - 3 V
9.2.14
9.2.15
Read Status Register (RDSR)
The Read Status Register (RDSR) instruction allows the Status Register to be read. Apart
form the parallelizing of the instruction code and the output data on the two pins DQ0 and
DQ1, the instruction functionality is exactly the same as the Read Status Register (RDSR)
instruction of the Extended SPI protocol, please refer to
Register (RDSR)
Figure 58. Read Status Register instruction sequence DIO-SPI
Write status register (WRSR)
The write status register (WRSR) instruction allows new values to be written to the status
register. Before it can be accepted, a write enable (WREN) instruction must previously have
been executed. Apart form the parallelizing of the instruction code and the input data on the
two pins DQ0 and DQ1, the instruction functionality and the protection feature management
is exactly the same as the Write Status Register (WRSR) instruction of the Extended SPI
protocol, please refer to
Figure 59. Write Status Register instruction sequence DIO-SPI
DQ0
DQ1
C
S
DQ0
*Address bit A23 is “Don’t Care.”
DQ1
C
S
for further details.
Section 9.1.24: Write status register (WRSR)
0
Instruction
1
0
2
Instruction
1
3
7
6
2
4
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5
4
3
5
Byte
Status Register Out
Status Register In
3
7
6
2
6
4
1
5
0
4
7
5
Byte
3
7
6
2
8
6
Section 9.1.23: Read Status
5
1
4
0
9 10 11
7
Byte
3
2
Dual_Read_SR
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1
0
for further details.
Instructions
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