MC145574AAC Freescale Semiconductor, MC145574AAC Datasheet - Page 128

• Manufacturer Part Number: MC145574AAC
• Description: IC TRANSCEIVER ISDN 32-LQFP
• Manufacturer: Freescale Semiconductor
• Type: Transceiverr

Specifications of MC145574AAC

• Voltage - Supply: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Protocol: -
• Lead Free Status / Rohs Status: Compliant

18–6
18.6
GCI TIMING FOR MASTER AND SLAVE MODE
NOTES:
Ref. No.
1. The FSC pulse is normally two DCL clock periods wide in GCI mode.
2. In GCI Master mode, the MC145574 will output a 512 kHz, 1.536 MHz or 2.048 MHz clock as selected by M2, M1 and M0
3. In GCI Slave mode, DCL may be any frequency that is a multiple of 512 kHz and is between 512 kHz and 4.096 MHz.
4. The duty cycle of DCL is between 45% and 55% when operated in Master Timing mode.
5a
5b
10
12
13
14
15
16
11
1
2
3
4
6
7
8
9
pins.
Delay From Rising Edge of DCL to FSC Output High
Delay From Rising Edge of DCL to FSC Output Low
FSC Input High Before the Falling Edge of DCL (FSC Setup Time)
FSC Input High After the Falling Edge of FSC (FSC Hold Time)
DCL Clock Period Master Mode
DCL Clock Period Slave Mode
DCL Pulse Width High
DCL Pulse Width Low
DCL Fall Time
DCL Rise Time
Delay From Rising Edge of FSC to Low–Z and Valid Data on D out
Delay From Rising Edge of DCL to Data Valid on D out
Delay From Rising Edge of DCL High–Z on D out
Data Valid on D in Before Rising Edge of DCL
Data Valid on D in After Rising Edge of DCL
Delay From Rising Edge of FSC to TSEN Low
Delay From Rising Edge of DCL to TSEN High
Freescale Semiconductor, Inc.
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Parameter
MC145574
2.048 kHz
512 kHz
Min
488
244
878
210
—
—
25
25
45
—
—
25
25
—
—
5
5
5
1953
1953
1074
Max
265
30
30
55
15
15
30
30
30
30
30
—
—
—
—
MOTOROLA
% of DCL
Period
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
1
2
3
4