DS33X11+ Maxim Integrated Products, DS33X11+ Datasheet - Page 145

IC MAPPING ETHERNET 144CSBGA

DS33X11+

Manufacturer Part Number
DS33X11+
Description
IC MAPPING ETHERNET 144CSBGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS33X11+

Applications
Data Transport
Interface
SPI
Voltage - Supply
1.8V, 2.5V, 3.3V
Package / Case
144-CSBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
00Bh:
Default
Register Name:
Register Description:
Register Address:
00Ah:
Default
Bit 15: Microport Interrupt Enable (MICIE) When this bit is set to 1, MICIS will generate an interrupt.
Bit 14: Decapsulation Interrupt Enable 4 (DECIE4) When this bit is set to 1, DECIS4 will generate an interrupt.
Bit 13: Decapsulation Interrupt Enable 3 (DECIE3) When this bit is set to 1, DECIS3 will generate an interrupt.
Bit 12: Decapsulation Interrupt Enable 2 (DECIE2) When this bit is set to 1, DECIS2 will generate an interrupt.
Bit 11: Encapsulation Interrupt Enable 4 (ECIE4) When this bit is set to 1, ECIS4 will generate an interrupt.
Bit 10: Encapsulation Interrupt Enable 3 (ECIE3) When this bit is set to 1, ECIS3 will generate an interrupt.
Bit 9: Encapsulation Interrupt Enable 2 (ECIE2) When this bit is set to 1, ECIS2 will generate an interrupt.
Bit 8: Receive VCAT Interrupt Enable (RVCATIE) When this bit is set to 1, RVCATIS will generate an interrupt.
Bit 6: Buffer Manager (Arbiter) Interrupt Enable (BUFIE) When this bit is set to 1, BUFIS will generate an
interrupt.
Bit 4: Transmit WAN Serial Port Interrupt Enable (TSPIE) When this bit is set to 1, TSPIS will generate an
interrupt.
Bit 3: Decapsulation Interrupt Enable 1 (DECIE1) When this bit is set to 1, DECIS1 will generate an interrupt.
Bit 2: Encapsulation Interrupt Enable 1 (ECIE1) When this bit is set to 1, ECIS1 will generate an interrupt.
Bit 1: Transmit LAN Interrupt Enable (TXLANIE) When this bit is set to 1, TXLANIS will generate an interrupt.
Bit 0: Receive LAN and Bridge Filter Interrupt Enable (RXLANIE) When this bit is set to 1, RXLANIS will
generate an interrupt.
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
Bit 15
MICIE
Bit 7
0
0
-
DECIE4
BUFIE
Bit 14
Bit 6
0
0
GL.IER
Global Interrupt Enable Register
00Ah
DECIE3
Bit 13
Bit 5
0
0
-
DECIE2
TSPIE
Bit 12
Bit 4
0
0
DECIE1
Bit 11
ECIE4
Bit 3
0
0
ECIE3
ECIE1
Bit 10
Bit 2
0
0
TXLANIE
ECIE2
Bit 9
Bit 1
0
0
RVCATIE
RXLANIE
145 of 375
Bit 8
Bit 0
0
0

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