PI7C8154ANAE Pericom Semiconductor, PI7C8154ANAE Datasheet - Page 73

• Manufacturer Part Number: PI7C8154ANAE
• Description: IC PCI-PCI BRIDGE ASYNC 304-PBGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8154ANAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 304-BGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 12-1 shows the states and related actions that the bridge performs during power management
transitions. (No other transactions are permitted.)
Table 12-1 POWER MANAGEMENT TRANSITIONS
PME# signals are routed from downstream devices around PCI-to-PCI bridges. PME# signals do
not pass through PCI-to-PCI bridges.
D0
D0
D0
D0
D3
D3
D3
Current Status
HOT
COLD
COLD
Support for D0, D1, D2, D3
bridge
Support of the B2 secondary bus power state when in the D3
D3
D3
D2
D1
D0
D3
D0
COLD
HOT
COLD
Next State
HOT
Page 73 of 114
, and D3
Power has been removed from PI7C8154A. A power-up reset must be
performed to bring PI7C8154A to D0.
If enabled to do so by the BPCCE pin, PI7C8154A will disable the
secondary clocks and drive them LOW.
Unimplemented. PI7C8154A will ignore the write to the power state bits.
Power state will remain at D0.
Unimplemented. PI7C8154A will ignore the write to the power state bits.
Power state will remain at D0.
PI7C8154A enables secondary clock outputs and performs an internal
chip reset. Signal S_RST# will not be asserted. All registers will be
returned to the reset values and buffers will be cleared.
Power has been removed from PI7C8154A. A power-up reset must be
performed to bring PI7C8154A to D0.
Power-up reset. PI7C8154A performs the standard power-up reset
functions as described in Section 11.
COLD
power management states for devices behind the
Action
HOT
ASYNCHRONOUS 2-PORT
power management state
DEC 2009 REVISION 1.02
PCI-to-PCI BRIDGE
Advance Information
PI7C8154A