ISL29004IROZ Intersil, ISL29004IROZ Datasheet - Page 6

• Manufacturer Part Number: ISL29004IROZ
• Description: IC SENSOR LIGHT-DGTL I2C 8-ODFN
• Manufacturer: Intersil
• Series: -r

Specifications of ISL29004IROZ

• Wavelength: 550nm
• Output Type: I²C™
• Package / Case: 8-WFDFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Register Set
There are eight registers that are available in the ISL29004.
Table 1 summarizes the available registers and their
functions.
ADDR
(HEX)
00
01
02
03
04
05
06
07
Interrupt threshold
Interrupt threshold
MSB_sensor
LSB_sensor
REGISTER
MSB_timer
Command
LSB_timer
Control
NAME
LO
HI
6
Bit(s)
3:2
1:0
3:2
1:0
7:0
7:0
7:0
7:0
7:0
7:0
7
6
5
4
7
6
5
4
FUNCTION NAME
Interrupt threshold
Interrupt threshold
Timing_Mode
MSB_sensor
LSB_sensor
mode<1:0>
width<1:0>
MSB_timer
test_mode
int_persist
LSB_timer
ext_mode
gain<1:0>
reserved
reserved
int_flag
enable
adcPD
<1:0>
TABLE 1. REGISTER SET
LO
HI
ISL29004
0: disable adc-core
0: Normal operation
Always set to logic 0. Factory use only.
Always set to logic 0. Factory use only.
Selects the gain so range is
Read-Only data register that contains the least significant byte of the
Read-Only data register that contains the most significant byte of the
Read-Only data register that contains the least significant byte of the
Read-Only data register that contains the most significant byte of the
1: enable adc-core
1: Power Down Mode
0: Integration is internally timed
1: Integration is externally sync/controlled by I
Selects ADC work mode
0: Diode1’s current to unsigned 16-bit data
1: Diode2’s current to unsigned 16-bit data
2: Difference between diodes (I1 - I2) to signed 15-bit data
3: reserved
number of clock cycles; n-bit resolution
0: 2
1: 2
2: 2
3: 2
Always set to logic 0
0: Interrupt is cleared or not yet triggered
1: Interrupt is triggered
0: 0 - 1000Lux
1: 0 - 4000Lux
2: 0 - 16000Lux
3: 0 - 64000Lux
Interrupt is triggered after
0: 1 integration cycle
1: 4 integration cycles
2: 8 integration cycles
3: 16 integration cycles
High byte of HI interrupt threshold. Default is 0xFF
High byte of the LO interrupt threshold. Default is 0x00
latest sensor reading
latest sensor reading
timer counter value corresponding to the latest sensor reading.
timer counter value corresponding to the latest sensor reading.
16
12
8
4
cycles
cycles
cycles
cycles
FUNCTIONS/DESCRIPTION
2
C host
December 21, 2006
FN6221.0