ISL29004IROZ Intersil, ISL29004IROZ Datasheet - Page 8

• Manufacturer Part Number: ISL29004IROZ
• Description: IC SENSOR LIGHT-DGTL I2C 8-ODFN
• Manufacturer: Intersil
• Series: -r

Specifications of ISL29004IROZ

• Wavelength: 550nm
• Output Type: I²C™
• Package / Case: 8-WFDFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Interrupt persist; Bits 1 and 0. The interrupt pin and the
interrupt flag is triggered/set when the data sensor reading is
out of the interrupt threshold window after m consecutive
number of integration cycles. The interrupt persist bits
determine m.
Interrupt Threshold HI Register 02(hex)
This register sets the the HI threshold for the interrupt pin
and the interrupt flag. By default the Interrupt threshold HI is
FF(hex). The 8-bit data written to the register represents the
upper MSB of a 16-bit value. The LSB is always 00(hex).
Interrupt Threshold LO Register 03(hex)
This register sets the the LO threshold for the interrupt pin
and the interrupt flag. By default the Interrupt threshold LO is
00(hex). The 8-bit data written to the register represents the
upper MSB of a 16-bit value. The LSB is always 00(hex).
Sensor Data Register 04(hex) and 05(hex)
When the device is configured to output a 16-bit data, the
most significant byte is accessed at 04(hex), and the least
significant byte can be accessed at 05(hex). The sensor data
register is refreshed after very integration cycle.
Timer Data Register 06(hex) and 07(hex)
Note that the timer counter value is only available when
using the External Timing Mode. The 06(hex) and 07(hex)
are the LSB and MSB respectively of a 16-bit timer counter
value corresponding to the most recent sensor reading.
Each clock cycle increments the counter. At the end of each
integration period, the value of this counter is made available
over the I
introduced by slight timing errors caused by imprecise
external timing. Microcontrollers, for example, often cannot
provide high-accuracy command-to-command timing, and
the timer counter value can be used to eliminate the
resulting noise.
BITS
3:2
0:0
0:1
1:0
1:1
TABLE 9. RANGE/GAIN TYPICAL FSR LUX RANGES
1
2
3
4
BITS 1:0
k RANGE(k)
0:0
0:1
1:0
1:1
2
C. This value can be used to eliminate noise
15,568
62,272
3892
973
TABLE 10. INTERRUPT PERSIST
R
RANGE@
EXT = 100k
FSR LUX
NUMBER OF INTEGRATION CYCLES
15,568
62,272
3892
973
8
R
RANGE@
FSR LUX
EXT = 50k
124,544
31,136
1946
7784
16
1
4
8
R
RANGE@
EXT = 500k
FSR LUX
12,454
3114
195
778
ISL29004
Calculating Lux
The ISL29004’s output codes, DATA, are directly
proportional to Lux.
The proportionality constant α is determined by the Full
Scale Range, FSR, and the n-bit ADC which is user defined
in the command register. The proportionality constant can
also be viewed as the resolution; The smallest Lux
measurement the device can measure is α.
Full Scale Range, FSR, is determined by the software
programmable Range/Gain, Range(k), in the command
register and an external scaling resistor R
referenced to 100kΩ.
FSR
The transfer function effectively for each timing mode
becomes:
INTERNAL TIMING MODE
EXTERNAL TIMING MODE
E
E
α
E
ADDRESS
n = 4, 8, 12, or 16. This is the number of clock cycles
programmed in the command register.
Range(k) is the user defined range in the Gain/Range bit
in the command register.
R
pin.
DATA is the output sensor reading in number of counts
available at the data register.
2
Internal Timing Mode. For the External Timing Mode the
=
=
=
=
n
(hex)
EXT
Range k ( )
----------------------------------------------------
α
FSR
------------
Range k ( )
----------------------------------------------------
04
05
06
07
=
represents the maximum number of counts possible in
2
×
n
Range k ( )
DATA
COUNTER
is an external scaling resistor hardwired to the R
2
Least-significant byte of most recent sensor reading.
Most-significant byte of most recent sensor reading.
Least-significant byte of timer counter value
corresponding to most recent sensor reading.
Most-significant byte of timer counter value
corresponding to most recent sensor reading.
n
×
×
TABLE 11. DATA REGISTERS
100kΩ
----------------- -
100kΩ
----------------- -
R
R
×
EXT
EXT
100kΩ
----------------- -
R
EXT
×
×
DATA
DATA
CONTENTS
EXT
which is
December 21, 2006
(EQ. 4)
FN6221.0
(EQ. 1)
(EQ. 5)
(EQ. 2)
(EQ. 3)
EXT