XCV600E-6BGG432C Xilinx Inc, XCV600E-6BGG432C Datasheet - Page 22

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XCV600E-6BGG432C

Manufacturer Part Number
XCV600E-6BGG432C
Description
FPGA Virtex-E Family 186.624K Gates 15552 Cells 357MHz 0.18um (CMOS) Technology 1.8V 432-Pin BGA
Manufacturer
Xilinx Inc
Datasheet

Specifications of XCV600E-6BGG432C

Package
432BGA
Family Name
Virtex-E
Device Logic Gates
186624
Device Logic Units
15552
Device System Gates
985882
Maximum Internal Frequency
357 MHz
Typical Operating Supply Voltage
1.8 V
Maximum Number Of User I/os
316
Ram Bits
294912
Re-programmability Support
Yes

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Part Number:
XCV600E-6BGG432C
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0
Virtex™-E 1.8 V Field Programmable Gate Arrays
3. At the rising edge of CCLK: If BUSY is Low, the data is
Table 11: SelectMAP Write Timing Characteristics
A flowchart for the write operation is shown in
Note that if CCLK is slower than f
asserts BUSY, In this case, the above handshake is unnec-
essary, and data can simply be entered into the FPGA every
CCLK cycle.
Abort
During a given assertion of CS, the user cannot switch from
a write to a read, or vice-versa. This action causes the cur-
Module 2 of 4
16
CCLK
accepted on this clock. If BUSY is High (from a previous
write), the data is not accepted. Acceptance instead
D
CS Setup/Hold
WRITE Setup/Hold
BUSY Propagation Delay
Maximum Frequency
Maximum Frequency with no handshake
0-7
Setup/Hold
DATA[0:7]
WRITE
CCLK
BUSY
CS
Description
No Write
5
3
CCNH
1
, the FPGA never
7
Figure 17: Write Operations
Figure
1/2
3/4
5/6
www.xilinx.com
7
Write
18.
2
4. Repeat steps 2 and 3 until all the data has been sent.
5. De-assert CS and WRITE.
rent packet command to be aborted. The device remains
BUSY until the aborted operation has completed. Following
an abort, data is assumed to be unaligned to word bound-
aries, and the FPGA requires a new synchronization word
prior to accepting any new packets.
To initiate an abort during a write operation, de-assert
WRITE. At the rising edge of CCLK, an abort is initiated, as
shown in
T
T
T
SMCSCC
occurs on the first clock after BUSY goes Low, and the
data must be held until this has happened.
SMCCW
SMDCC
No Write
T
Symbol
F
SMCKBY
Figure
F
CCNH
CC
/T
/T
/T
SMCCD
SMCCCS
SMWCC
19.
Write
Production Product Specification
4
DS022-2 (v2.8) January 16, 2006
6
5.0 / 1.7
7.0 / 1.7
7.0 / 1.7
DS022_45_071702
12.0
66
50
MHz, max
MHz, max
ns, max
ns, min
ns, min
ns, min
Units
R

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