AT89LP828 Atmel Corporation, AT89LP828 Datasheet - Page 65

• Manufacturer Part Number: AT89LP828
• Manufacturer: Atmel Corporation

Specifications of AT89LP828

• Flash (kbytes): 8 Kbytes
• Max. Operating Frequency: 25 MHz
• Cpu: 8051-1C
• Max I/o Pins: 30
• Spi: 1
• Uart: 1
• Sram (kbytes): 0.75
• Eeprom (bytes): 1024
• Self Program Memory: IAP
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 3
• Isp: SPI/OCD
• Watchdog: Yes

Table 13-5.
13.2
3654A–MICRO–8/09
T2CCF Address = 0D5H
Not Bit Addressable
Bit
Symbol
CCFD
CCFC
CCFB
CCFA
Input Capture Mode
–
7
Function
Channel D Compare/Capture Interrupt Flag. Set by a compare/capture event on channel D. Must be cleared by software.
CCFD will generate an interrupt when CIEND = 1 and ECC = 1.
Channel C Compare/Capture Interrupt Flag. Set by a compare/capture event on channel C. Must be cleared by
software. CCFC will generate an interrupt when CIENC = 1 and ECC = 1.
Channel B Compare/Capture Interrupt Flag. Set by a compare/capture event on channel B. Must be cleared by software.
CCFB will generate an interrupt when CIENB = 1 and ECC = 1.
Channel A Compare/Capture Interrupt Flag. Set by a compare/capture event on channel A. Must be cleared by software.
CCFA will generate an interrupt when CIENA = 1 and ECC = 1.
T2CCF – Timer/Counter 2 Compare/Capture Flags
The Compare/Capture Array provides a variety of capture modes suitable for time-stamping
events or performing measurements of pulse width, frequency, slope, etc. The CCA channels
are configured for capture mode by clearing the CCMx bit in the associated CCCx register to 0.
Each time a capture event occurs, the contents of Timer 2 (TH2 and TL2) are transferred to the
16-bit data register of the corresponding channel, and the channel’s interrupt flag CCFx is set in
T2CCF. Optionally, the capture event may also clear Timer 2 to 0000H by setting the CTCx bit in
CCCx. The capture event is defined by the CxM
internally generated. A diagram of a CCA channel in capture mode is shown in
Figure 13-2. CCA Capture Mode Diagram
–
6
(P2.x) CCx
–
5
Timer 0 Overflow
Timer 1 Overflow
Comparator A
Comparator B
–
4
“0”
CCFD
0
1
2
3
4
5
6
7
CTCx
3
CxM
2-0
2-0
bits in CCCx and may be either externally or
T2CCL
CCxL
CCFC
00H
TL2
2
T2CCH
CCxH
00H
TH2
Reset Value = XXXX 0000B
CCFB
AT89LP428/828
1
T2CCC
CCCx
CIENx
CCFx
Figure
CCFA
0
Interrupt
13-2.
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