ATxmega256A3 Atmel Corporation, ATxmega256A3 Datasheet - Page 141

• Manufacturer Part Number: ATxmega256A3
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Speed: No
• Usb Interface: No
• Spi: 10
• Twi (i2c): 2
• Uart: 7
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

13.14.10 INTCTRL - Interrupt Control Register
13.14.11 INT0MASK - Interrupt 0 Mask Register
13.14.12 INT1MASK - Interrupt 1 Mask Register
8077H–AVR–12/09
• Bit 7:4 - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 3:2/1:0 - INTnLVL[1:0]: Interrupt n Level
These bits enable interrupt request for port interrupt n and select the interrupt level as described
in
• Bit 7:0 - INT0MSK[7:0]: Interrupt 0 Mask Register
These bits are used to mask which pins can be used as sources for port interrupt 0. If
INT0MASKn is written to one, pin n is used as source for port interrupt 0.The input sense config-
uration for each pin is decided by the PINnCTRL-registers.
• Bit 7:0 - INT1MASK[7:0]: Interrupt 1 Mask Register
These bits are used to mask which pins can be used as sources for port interrupt 1. If
INT1MASKn is written to one, pin n is used as source for port interrupt 1.The input sense config-
uration for each pin is decided by the PINnCTRL-registers.
Bit
+0x09
Read/Write
Initial Value
Bit
+0x0B
Read/Write
Initial Value
Bit
+0x0A
Read/Write
Initial Value
Section 12. ”Interrupts and Programmable Multi-level Interrupt Controller” on page
R/W
R/W
7
R
0
7
0
-
7
0
R/W
R/W
6
R
0
6
0
-
6
0
R/W
R/W
R
5
0
5
0
-
5
0
R/W
R/W
R
4
0
4
0
-
4
0
INT1MSK[7:0]
INT0MSK[7:0]
R/W
R/W
R/W
3
0
3
0
3
0
INT1LVL[1:0]
R/W
R/W
R/W
2
0
0
2
0
2
R/W
R/W
R/W
1
0
1
0
1
0
INT0LVL[1:0]
XMEGA A
R/W
R/W
R/W
0
0
0
0
0
0
123.
INT0MASK
INT1MASK
INTCTRL
141