ATxmega256A3 Atmel Corporation, ATxmega256A3 Datasheet - Page 72

• Manufacturer Part Number: ATxmega256A3
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Speed: No
• Usb Interface: No
• Spi: 10
• Twi (i2c): 2
• Uart: 7
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8077H–AVR–12/09
Table 6-3.
Note:
Table 6-4.
T/C Event E
0
0
0
1
1
1
1
CHnMUX[7:4]
0001
0010
0010
0010
0011
0100
0101
0101
0110
0110
0111
0111
1000
1001
1010
1011
1100
1100
1101
1101
1110
1110
1111
1111
0
0
1
0
0
1
1
1. The description of how PORTS generate events are described in
0
1
X
0
1
0
1
CHnMUX[7:0] Bit Settings (Continued)
Timer/Counter Events
Group Configuration
TCxn_OVF
TCxn_ERR
TCxn_CCA
TCxn_CCA
TCxn_CCA
TCxn_CCA
CHnMUX[3:0]
X
X
X
X
X
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
X
X
X
X
X
X
X
0
1
M
X
X
X
X
X
X
X
E
E
E
E
E
E
E
E
n
n
n
n
n
n
n
n
X
X
X
X
X
X
X
Group Configuration
ADCA_CHn
ADCB_CHn
PORTA_PINn
PORTB_PINn
PORTC_PINn
PORTD_PINn
PORTE_PINn
PORTF_PINn
PRESCALER_M
See
See
See
See
See
See
See
See
Table 6-4
Table 6-4
Table 6-4
Table 6-4
Table 6-4
Table 6-4
Table 6-4
Table 6-4
Event Type
Over-/Underflow (x = C, D, E or F) (n= 0 or 1)
Error (x = C, D, E or F) (n= 0 or 1)
(Reserved)
Capture or Compare A (x = C, D, E or F) (n= 0 or 1)
Capture or Compare B (x = C, D, E or F) (n= 0 or 1)
Capture or Compare C (x = C, D, E or F) (n= 0 or 1)
Capture or Compare D (x = C, D, E or F) (n= 0 or 1)
(1)
(1)
(1)
(1)
(1)
(1)
Event Source
(Reserved)
ADCA Channel n (n =0, 1, 2 or 3)
ADCB Channel n (n=0, 1, 2 or 3)
(Reserved)
(Reserved)
(Reserved)
PORTA Pin n (n= 0, 1, 2 ... or 7)
PORTB Pin n (n= 0, 1, 2 ... or 7)
PORTC Pin n (n= 0, 1, 2 ... or 7)
PORTD Pin n (n= 0, 1, 2 ... or 7)
PORTE Pin n (n= 0, 1, 2 ... or 7)
PORTF Pin n (n= 0, 1, 2 ... or 7)
Clk
(Reserved)
(Reserved)
(Reserved)
Timer/Counter C0 event type E
Timer/Counter C1 event type E
Timer/Counter D0 event type E
Timer/Counter D1 event type E
Timer/Counter E0 event type E
Timer/Counter E1 event type E
Timer/Counter F0 event type E
Timer/Counter F1 event type E
PER
divide by M (M=1 to 32768)
”Port Event” on page
XMEGA A
136.
72