SAM9260 Atmel Corporation, SAM9260 Datasheet - Page 122

• Manufacturer Part Number: SAM9260
• Manufacturer: Atmel Corporation

Specifications of SAM9260

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 210 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 7
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 312
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

TC: Timer Counter
Figure 43. TC Block Diagram
122
MCK/2
MCK/8
MCK/32
MCK/128
MCK/1024
AT91X40 Series
Timer Counter Block
TCLK0
TCLK1
TCLK2
TCLK0
TCLK1
TCLK2
TCLK0
TCLK1
TCLK2
TIOA1
TIOA2
TIOA0
TIOA2
TIOA0
TIOA1
The AT91X40 Series features a Timer Counter block which includes three identical 16-
bit timer counter channels. Each channel can be independently programmed to perform
a wide range of functions including frequency measurement, event counting, interval
measurement, pulse generation, delay timing and pulse width modulation.
Each Timer Counter channel has 3 external clock inputs, 5 internal clock inputs, and 2
multi-purpose input/output signals which can be configured by the user. Each channel
drives an internal interrupt signal which can be programmed to generate processor
interrupts via the AIC (Advanced Interrupt Controller).
The Timer Counter block has two global registers which act upon all three TC channels.
The Block Control Register allows the three channels to be started simultaneously with
the same instruction. The Block Mode Register defines the external clock inputs for
each Timer Counter channel, allowing them to be chained.
TC0XC0S
TC1XC1S
TC2XC2S
XC0
XC1
XC2
XC0
XC1
XC2
XC0
XC1
XC2
Timer Counter
Timer Counter
Timer Counter
Channel 0
Channel 1
Channel 2
SYNC
SYNC
SYNC
TIOA
TIOB
TIOA
TIOB
TIOA
TIOB
INT
INT
INT
TIOA0
TIOB0
TIOA1
TIOB1
TIOA2
TIOB2
Advanced
Controller
Interrupt
Parallel IO
Controller
1354D–ATARM–08/02
TCLK0
TCLK1
TCLK2
TIOA0
TIOB0
TIOA1
TIOB1
TIOA2
TIOB2