TMPM380FYDFG Toshiba, TMPM380FYDFG Datasheet - Page 350

• Manufacturer Part Number: TMPM380FYDFG
• Manufacturer: Toshiba

Specifications of TMPM380FYDFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 16K
• Number Of Pins: 100
• Package: QFP(14×20)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 2
• I2c/sio (ch): 2
• Uart/sio (ch): 5
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 18
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

13 Serial channel (UART/SIO)
Pin name
Interrupt
In the UART mode, TMRB
output to use for the serial
transfer clock
(address)
Register
13.1 Features
name
Important
TMPM382 (64-pin version) does not implement SIO2 and SIO3.
Please do not use these functions if you use this product.
Each channel consists of a prescaler, a serial clock generation circuit, a receive buffer, its control
circuit, a transmit buffer and its control circuit. Each channel functions independently.
As the SIOs 0 to 4 operate in the same way, only SIO0 is described here.
This device has five serial I/O channels: SIO0 to SIO4.
Each channel operates in either the UART mode (asynchronous communication) or the I/O interface
mode (synchronous communication) which is selected by the user.
I/O interface mode
Asynchronous (UART) mode:
In the above modes 1 and 2, parity bits can be added. The mode 3 has a wakeup function in which
the master controller can start up slave controllers via the serial link (multi-controller system). Fig
13-2 shows the block diagram of SIO0.
Transmit/ receive
generator control
Control register
Enable register
Mode control
Baud rate
register 0
register
Table 13-1 Difference in the Specifications of SIO Modules
TXD0 (PE0)
RXD0 (PE1)
(PE2)
CTS0
0x4002_008C
0x4002_0080
0x4002_0084
0x4002_0088
0x4002_0090
Channel 0
SC0MOD0
SC0BRCR
(TMRB4)
TB4OUT
SC0BUF
INTRX0
INTTX0
SC0EN
SC0CR
/SCLK0
TMPM380/M382 - 1 / 52 -
TXD1 (PA5)
RXD1 (PA6)
(PA4)
CTS1
0x4002_00CC
0x4002_00C0
0x4002_00C4
0x4002_00C8
0x4002_00D0
Channel 1
SC1MOD0
SC1BRCR
TB4OUT
(TMRB4)
SC1BUF
INTRX1
INTTX1
SC1CR
SC1EN
Mode 0: This is the mode to transmit and receive I/O data
Mode 2: TX/RX Data Length: 8 bits
and associated synchronization signals (SCLK) to extend I/O.
Mode 1: TX/RX Data Length: 7 bits
Mode 3: TX/RX Data Length: 9 bits
/SCLK1
TXD2 (PD5)
RXD2 (PD6)
(PD4)
CTS2
0x4002_010C
0x4002_0100
0x4002_0104
0x4002_0108
0x4002_0110
Channel 2
SC2MOD0
SC2BRCR
TB7OUT
(TMRB7)
SC2BUF
INTRX2
INTTX2
SC2EN
SC2CR
/SCLK2
TXD3 (PF3)
RXD3 (PF4)
(PF2)
CTS3
0x4002_014C
0x4002_0140
0x4002_0144
0x4002_0148
0x4002_0150
Channel 3
SC3MOD0
SC3BRCR
(TMRB7)
TB7OUT
SC3BUF
INTRX3
INTTX3
SC3EN
SC3CR
/SCLK3
TXD4 (PC6)
RXD4(PC7)
(PC5)
CTS4
TMPM380/M382
0x4002_018C
0x4002_0180
0x4002_0184
0x4002_0188
0x4002_0190
Channel 4
MTTB0OUT
SC4MOD0
SC4BRCR
SC4BUF
INTRX4
INTTX4
(MPT0)
SC4EN
SC4CR
/SCLK4