TMPM380FYDFG Toshiba, TMPM380FYDFG Datasheet - Page 458

• Manufacturer Part Number: TMPM380FYDFG
• Manufacturer: Toshiba

Specifications of TMPM380FYDFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 16K
• Number Of Pins: 100
• Package: QFP(14×20)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 2
• I2c/sio (ch): 2
• Uart/sio (ch): 5
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 18
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

15.6.4 Generating the Stop Condition
When SBInSR <BB> is “1,” writing “1” to SBInCR2 <MST, TRX, PIN> and “0” to <BB>
causes the SBI to start a sequence for generating the stop condition on the bus. Do not
alter the contents of <MST, TRX, BB, PIN> until the stop condition appears on the bus.
If another device is holding down the SCL bus line, the SBI waits until the SCL line is
released. After that, the SDA pin goes high, causing the stop condition to be generated.
SBInCR2 ← 1 1 0 1 1 0 0 0
“1” → <MST>
“1” → <TRX>
“0” → <BB>
“1” → <PIN>
SCL pin
SDA pin
<PIN>
<BB> (
7 6 5 4 3 2 1 0
read
Fig 15-18 Generating the Stop Condition
)
TMPM380/M382 - 29 / 41 -
Generates the stop condition.
Stop condition
TMPM380/M382