TMPM380FYDFG Toshiba, TMPM380FYDFG Datasheet - Page 391

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TMPM380FYDFG

Manufacturer Part Number
TMPM380FYDFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM380FYDFG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
256K
Rom Type
Flash
Ram (kbytes)
16K
Number Of Pins
100
Package
QFP(14×20)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
2
I2c/sio (ch)
2
Uart/sio (ch)
5
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
18
16-bit Timer / Counter
8
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
13 Serial channel (UART/SIO)
Transimit data
write timing
SCLK0 input
(<SCLKS>=0
Rising edge mode)
SCLK0 input
(<SCLKS>=1
Falling edge mode)
Transimit data
write timing
SCLK0 input
(<SCLKS>=0
Rising edge more)
SCLK0 input
(<SCLKS>=1
Falling edge mode)
Transmit data
write timing
SCLK0 input
(<SCLKS>=0
Rising edge mode)
SCLK0 input
(<SCLKS>=1
Falling edge mode)
(INTTX0 interrupt request)
(INTTX0 interrupt request)
(INTTX0 Interrupt request)
TBRUN
TBEMP
PERR(
TBRUN
TBEMP
TXD0
TXD0
TXD0
functions to detect under-run errors
Fig 13-11 Transmit Operation in the I/O Interface Mode (SCLK0 Input Mode)
<WBUF>=“1” (if double buffering is enabled and there is no data in buffer)
<WBUF>=“1” (if double buffering is enabled and there is data in buffer)
bit 0
bit 0
bit 0
<WBUF>=“0” (if double buffering is disabled
)
bit 1
bit 1
bit 1
TMPM380/M382 - 42 / 52 -
bit 5
bit 5
bit 5
bit 6
bit 6
bit 6
bit 7
bit 7
bit 7
A
A
A
bit 0
bit 0
TMPM380/M382
bit 1
bit 1
1

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