STPCI01 STMicroelectronics, STPCI01 Datasheet - Page 44

• Manufacturer Part Number: STPCI01
• Description: STPC INDUSTRIAL - PC COMPATIBLE EMBEDED MICROPROC
• Manufacturer: STMicroelectronics

ELECTRICAL SPECIFICATIONS
Figure 4-7 Refresh Cycle (ref table
Table 4-6. AC Memory Timing Characteristics
44/69
Note 1; T
Where T
T
Note 2; Value to be derived from CAS pulse width which is programmable (see
Note 3; for all chronograms, CLK refers to the clock signal that the program is using. It can be either HCLK or GCLK2X
Dataoff
tCMWE
RAS#[3:0]
CAS#[7:0]
tGCMD
tCRAS
tCCAS
tCRW
tCMD
tMDG
MA[11:0]
tCMA
tCHR
tCOH
tRCD
tCAH
tCPN
tCRP
tCSR
tRAH
tRAS
tRC
tDS
n
T
t
CAS Out
CAS
Dataoff
and t
CLK
Cycle
Cycle
is the number of CAS Cycles (see
CAS Out
is the number of clock cycles.
Parameter
is the Generic Datahold
x n
HCLK (or GCLK2X) to RAS#[3:0] valid (see Note 3)
HCLK (or GCLK2X) to CAS#[7:0] bus valid (see Note 3)
HCLK (or GCLK2X) to MA[11:0] bus valid (see Note 3)
HCLK (or GCLK2X) to MWE# valid (see Note 3)
HCLK to MD[63:0] bus valid (see Note 3)
GCLK2X to MD[63:0] bus valid (see Note 3)
MD[63:0] Generic hold
Column Address Hold Time
CAS Hold Time
Data Hold TIme from CAS Low
CAS Precharge Time
CAS to RAS Precharge Time
CAS Low to RAS HIGH (Write only)
CAS Setup Time
Data In Setup Time
Row Address Hold Time
RAS Pulse Width
Random Read or Write Time Cycle
RAS to CAS Delay Time
the CLK (either HCLK or GCLK2X) to CAS Low.
CAS
are used to refine the timing programming.
+ (t
tCPN
tCPN
Data off
tRPC
- t
tRP
tRP
CAS out
tCSR
tCRS
)
Table
Issue 2.4 - February 11, 2002
Section
4-6)
tCCAS
6.7.)
tCRAS
tCHR
tRAS
tRAS
Section
1T
1T
1T
Note 1
1T
1T
1T
1T
3T
6T
1T
Min
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
0
6.7.).
tCPN
tCPN
1T
Max
17
17
17
17
25
23
tRPC
Cycles
tRP
tRP
tCSR
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns