CS61305A-IL1 Cirrus Logic, Inc., CS61305A-IL1 Datasheet - Page 18

• Manufacturer Part Number: CS61305A-IL1
• Description: T1/E1 line interface
• Manufacturer: Cirrus Logic, Inc.

Writing a "0" to either "Clear LOS" or "Clear
DPM" enables the corresponding interrupt for
LOS or DPM.
Note: Bit D0 is the first bit output (LSB)
During a read cycle (R/W = 1), data is read from
the output data register on the eight clock cycles
immediately following the address/ command
byte. The output data format over SDO is shown
in Tables 11 and 12.
Bits D2, D3 and D4 can be read to verify line
length selection. Bits D5, D6 and D7 must be de-
coded according to Table 12. Codes 101, 110 and
111 (Bits D5, D6 and D7) indicate intermittent
losses of signal and/or driver problems.
The SDO pin goes to a high impedance state
when not in use. The SDO and SDI pins may be
tied together in applications where the host proc-
essor has a bi-directional I/O port.
Power Supply
The device operates from a single +5 Volt supply.
Separate pins for transmit (TV+, TGND) and re-
ceive (RV+, RGND) supplies provide internal
isolation. These pins should be connected exter-
nally near the device and decoupled to their
18
Bit
D0
D1
D2
D3
D4
1) The current interrupt on the serial interface
2) Output data bits D5, D6 and D7 will be re-
3) Future interrupts for the corresponding LOS
Table 11. Output Data Register (bits D0-D4)
will be cleared. (Note that simply reading
the register bits will not clear the inter-
rupt).
set as appropriate.
or DPM will be prevented from occurring.
Designation
LEN0
LEN1
LEN2
DPM
LOS
Loss of Signal
Driver Performance Monitor
Bit 0 - Line Length Select
Bit 1 - Line Length Select
Bit 2 - Line Lenght Select
Description
respective grounds. TV+ must not exceed RV+ by
more than 0.3V.
Decoupling and filtering of the power supplies is
crucial for the proper operation of the analog cir-
cuits in both the transmit and receive paths. A 1.0
and TGND, and a 0.1 F capacitor should be con-
nected between RV+ and RGND. Use mylar or
ceramic capacitors and place them as closely as
possible to their respective power supply pins. A
68 F tantalum capacitor should be added close
to the RV+/RGND supply. Wire-wrap bread-
boarding of the line interface is not recommended
because lead resistance and inductance serve to
defeat the function of the decoupling capacitors.
D5 D6 D7
0 0 0 Reset has occurred or no program input.
0 0 1 TAOS in effect.
0 1 0 LLOOP in effect.
0 1 1 TAOS/LLOOP in effect.
1 0 0 RLOOP in effect
1 0 1 DPM changed state since last "clear DPM"
1 1 0 LOS changed state since last "clear LOS"
1 1 1 LOS and DPM have changed state since
F capacitor should be connected between TV+
Bits
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Table 12. Output Data Register (bits D5-D7)
occured.
occured.
last "clear LOS" and "clear DPM".
Status
CS61305A
DS157PP3