CS61305A-IL1 Cirrus Logic, Inc., CS61305A-IL1 Datasheet - Page 5

• Manufacturer Part Number: CS61305A-IL1
• Description: T1/E1 line interface
• Manufacturer: Cirrus Logic, Inc.

T1 SWITCHING CHARACTERISTICS
GND = 0V; Inputs: Logic 0 = 0V, Logic 1 = RV+; See Figures 1, 2, & 3)
Notes: 23. Crystal must meet specifications described in CXT6176/CXT8192 data sheet.
DS157PP3
Crystal Frequency
ACLKI Duty Cycle
ACLKI Frequency
RCLK Cycle Width
Rise Time, All Digital Outputs
Fall Time, All Digital Outputs
TCLK Frequency
TCLK Pulse Width
TPOS/TNEG (TDATA) to TCLK Falling Setup Time
TCLK Falling to TPOS/TNEG (TDATA) Hold Time
RPOS/RNEG Valid Before RCLK Falling
RDATA Valid Before RCLK Falling
RPOS/RNEG Valid Before RCLK Rising
RPOS/RNEG Valid After RCLK Falling
RDATA Valid After RCLK Falling
RPOS/RNEG Valid After RCLK Rising
24. ACLKI provided by an external source or TCLK but not RCLK.
25. RCLK duty cycle will vary with extent by which pulses are displaced by jitter. Specified under worst
26. At max load of 1.6 mA and 50 pF.
27. Host Mode (CLKE = 1).
28. Hardware Mode, or Host Mode (CLKE = 0).
29. Extended Hardware Mode.
30. The maximum TCLK burst rate is 5 MHz and t
case jitter conditions: 0.4 UI AMI data displacement for T1 and 0.2 UI AMI data displacement for E1.
be tolerated on TCLK is 138 VI.
Parameter
(Notes 16, 27, 28)
(Notes 29, 30)
(Note 23)
(Note 24)
(Note 25)
(Note 26)
(Note 26)
(Note 27)
(Note 29)
(Note 28)
(Note 27)
(Note 29)
(Note 28)
(TA = -40 C to 85 C; TV+, RV+ = 5.0V 5%;
pw2
(min) = 200ns. The maximum gap size that can
t
Symbol
pwh3
t
t
t
f
t
pwh1
pwh2
t
t
t
t
f
aclki
pwl1
pw1
t
t
t
t
su2
su1
su1
su1
tclk
f
t
t
h2
h1
h1
h1
c
r
f
/t
pw3
Min
320
130
100
150
150
150
150
150
150
150
40
80
25
25
-
-
-
-
-
6.176000
1.544
1.544
Typ
648
190
458
274
274
274
274
274
274
-
-
-
-
-
-
-
CS61305A
Max
980
240
850
500
60
85
85
-
-
-
-
-
-
-
-
-
-
-
-
Units
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
5