STPC STMicroelectronics, STPC Datasheet - Page 17

• Manufacturer Part Number: STPC
• Description: PC Compatible Embeded Microprocessor
• Manufacturer: STMicroelectronics

www.DataSheet4U.com
LA[22]/SCS1# Unlatched Address (ISA)/Second-
ary Chip Select (IDE)
This pin has two functions, depending on whether
the ISA bus is active or the IDE bus is active.
When the ISA bus is active, this pins is ISA Bus
unlatched address bit 22 for 16-bit devices. When
ISA bus is accessed by any cycle initiated from
PCI bus, this pin is in output mode. When an ISA
bus master owns the bus, this pins is in input
mode.
When the IDE bus is active, this signals is used as
the active high secondary slave IDE chip select
signal. This signal is to be externally ANDed with
the ISAOE
to guarantee it is active only when ISA bus is idle.
LA[21]/PCS3# Unlatched Address (ISA)/Primary
Chip Select (IDE). This pin has two functions, de-
pending on whether the ISA bus is active or the
IDE bus is active.
When the ISA bus is active, this pins is ISA Bus
unlatched address bit 21 for 16-bit devices. When
ISA bus is accessed by any cycle initiated from
PCI bus, this pin is in output mode. When an ISA-
bus master owns the bus, this pins is in input
mode.
When the IDE bus is active, this signals is used as
the active high primary slave IDE chip select sig-
nal. This signal is to be externally NANDed with
the ISAOE
to guarantee it is active only when ISA bus is idle.
LA[20]/PCS1# Unlatched Address (ISA)/Primary
Chip Select (IDE). This pin has two functions, de-
pending on whether the ISA bus is active or the
IDE bus is active.
When the ISA bus is active, this pins is ISA Bus
unlatched address bit 20 for 16-bit devices. When
ISA bus is accessed by any cycle initiated from
PCI bus, this pin is in output mode. When an ISA
bus master owns the bus, this pins is in input
mode.
When the IDE bus is active, this signals is used as
the active high primary slave IDE chip select sig-
nal. This signal is to be externally NANDed with
the ISAOE
to guarantee it is active only when ISA bus is idle.
#
#
#
signal before driving the IDE devices
signal before driving the IDE devices
signal before driving the IDE devices
Issue 1.2
LA[19:17]/DA[2:0] Unlatched Address (ISA)/Ad-
dress (IDE). These pins are multi-function pins.
They are used as the ISA bus unlatched address
bits [19:17] for ISA bus or the three address bits
for the IDE bus devices.
When used by the ISA bus, these pins are ISA
Bus unlatched address bits 19-17 on 16-bit devic-
es. When ISA bus is accessed by any cycle initiat-
ed from the PCI bus, these pins are in output
mode. When an ISA bus master owns the bus,
these pins are tristated.
For IDE devices, these signals are used as the
DA[2:0] and are connected to DA[2:0] of IDE de-
vices directly or through a buffer. If the toggling of
signals are to be masked during ISA bus cycles,
they can be externally ORed before being con-
nected to the IDE devices.
SA[19:8]/DD[11:0] Unlatched Address (ISA)/Data
Bus (IDE). These are multifunction pins. When the
ISA bus is active, they are used as the ISA bus
system address bits 19-8. When the IDE bus is ac-
tive, they serve as IDE signals DD[11:0].
These pins are used as an input when an ISA bus
master owns the bus and are outputs at all other
times.
IDE devices are connected to SA[19:8] directlyand
ISA bus is connected to these pins through two
LS245 transceivers. The OE of the transceivers
are connected to ISAOE
MASTER
connected to CPC and IDE DD bus and B bus sig-
nals are connected to ISA SA bus.
DD[15:12] Databus (IDE). The high 4 bits of the
IDE databus are combined with several of the X-
bus lines. Refer to the following section for X-bus
pins for further information.
SA[7:0] ISA Bus address bits [7:0]. These are the
8 low bits of the system address bus of ISA on 8-
bit slot. These pins are used as an input when an
ISA bus master owns the bus and are outputs at
all other times.
SD[15:0] I/O Data Bus (ISA). These pins are the
external databus to the ISA bus.
#
. A bus signals of the transceivers are
#
and DIR is connected to
PIN DESCRIPTION
17/51