STPC STMicroelectronics, STPC Datasheet - Page 6

• Manufacturer Part Number: STPC
• Description: PC Compatible Embeded Microprocessor
• Manufacturer: STMicroelectronics

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GENERAL DESCRIPTION
1. GENERAL DESCRIPTION
At the heart of the STPC Consumer is an ad-
vanced processor block, dubbed the 5ST86. The
5ST86 includes a powerful x86 processor core
along with a 64-bit DRAM controller, advanced
64bit accelerated graphics and video controller, a
high speed PCI local-bus controller and Industry
standard PC chip set functions (Interrupt control-
ler, DMA Controller, Interval timer and ISA bus)
and EIDE controller.
The STPC Consumer has in addition to the
5ST86, a Video subsystem and high quality digital
Television output.
The STMicroelectronics x86 processor core is em-
bedded with standard and application specific pe-
ripheral modules on the same silicon die. The core
has all the functionality of the STMicroelectronics
standard x86 processor products, including the
low power System Management Mode (SMM).
System Management Mode (SMM) provides an
additional interrupt and address space that can be
used for system power management or software
transparent emulation of peripherals. While run-
ning in isolated SMM address space, the SMM in-
terrupt routine can execute without interfering with
the operating system or application programs.
Further power management facilities include a
suspend mode that can be initiated from either
hardware or software. Because of the static nature
of the core, no internal data is lost.
The STPC Consumer makes use of a tightly cou-
pled Unified Memory Architecture (UMA), where
the same memory array is used for CPU main
memory and graphics frame-buffer. This signifi-
cantly reduces total system memory with system
performances equal to that of a comparable solu-
tion with separate frame buffer and system mem-
ory. In addition, memory bandwidth is improved by
attaching the graphics engine directly to the 64-bit
processor host interface running at the speed of
the processor bus rather than the traditional PCI
bus.
The 64-bit wide memory array provides the sys-
tem with 320MB/s peak bandwidth, double that of
an equivalent system using 32 bits. This allows for
higher screen resolutions and greater color depth.
The processor bus runs at the speed of the proc-
essor (DX devices) or half the speed (DX2 devic-
es).
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Issue 1.2
The ‘standard’ PC chipset functions (DMA, inter-
rupt controller, timers, power management logic)
are integrated with the x86 processor core.
The PCI bus is the main data communication link
to the STPC Consumer chip. The STPC Consum-
er translates appropriate host bus I/O and Memory
cycles onto the PCI bus. It also supports the gen-
eration of Configuration cycles on the PCI bus.
The STPC Consumer, as a PCI bus agent (host
bridge class), fully complies with PCI specification
2.1. The chip-set also implements the PCI manda-
tory header registers in Type 0 PCI configuration
space for easy porting of PCI aware system BI-
OS. The device contains a PCI arbitration function
for three external PCI devices.
The STPC Consumer integrates an ISA bus con-
troller. Peripheral modules such as parallel and
serial communications ports, keyboard controllers
and additional ISA devices can be accessed by
the STPC Consumer chip set through this bus.
An industry standard EIDE (ATA 2) controller is
built in to the STPC Consumer and connected in-
ternally via the PCI bus.
Graphics functions are controlled by the on-chip
SVGA controller and the monitor display is man-
aged by the 2D graphics display engine.
This Graphics Engine is tuned to work with the
host CPU to provide a balanced graphics system
with a low silicon area cost. It performs limited
graphics drawing operations, which include hard-
ware acceleration of text, bitblts, transparent blts
and fills. These operations can act on off-screen
or on-screen areas. The frame buffer size ranges
up to 4 Mbytes anywhere in the physical main
memory.
The graphics resolution supported is a maximum
of 1280x1024 in 65536 colours at 75Hz refresh
rate and is VGA and SVGA compatible. Horizontal
timing fields are VGA compatible while the vertical
fields are extended by one bit to accommodate the
above display resolution.
STPC Consumer provides several additional func-
tions to handle MPEG or similar video streams.
The Video Input Port accepts an encoded digital
video stream in one of a number of industry stand-
ard formats, decodes it, optionally decimates it by
a factor of 2:1, and deposits it into an off screen
area of the frame buffer. An interrupt request can
be generated when an entire field or frame has
been captured.