MT28F322D20 Micron Technology, MT28F322D20 Datasheet - Page 21

• Manufacturer Part Number: MT28F322D20
• Description: (MT28F322D18 / MT28F322D20) FLASH MEMORY
• Manufacturer: Micron Technology

2 Meg x 16 Async/Page/Burst Flash Memory
MT28F322D20FH_4.p65 – Rev. 4, Pub. 7/02
13-11
BIT #
5-4
2-0
15
14
10
9
8
7
6
3
RM
BS
15
7
DESCRIPTION
Read Mode (RM)
Reserved
Latency Counter (LC)
Reserved
Hold Data Out (HDO)
Wait Configuration (WC)
Burst Sequence (BS)
Clock Configuration (CC)
Reserved
Burst Wrap (BW)
Burst Length (BL)
CC
14
R
6
LC2
13
R
5
Read Configuration Register
FUNCTION
0 = Synchronous Burst Access Mode
1 = Asynchronous/Page Access Mode (Default)
Default = 0
Sets the number of clock cycles before valid data out:
000 = Code 0 - reserved
001 = Code 1 - reserved
010 = Code 2
011 = Code 3
100 = Code 4
101 = Code 5 - reserved
110 = Code 6 - reserved
111 = Code 7 - reserved (Default)
Default = 0
Sets the data output configuration:
0 = Hold data for one clock
1 = Hold data for two clocks (Default)
Controls the behavior of the WAIT# output signal:
0 = WAIT# asserted during delay
1 = WAIT# asserted one data cycle before delay (Default)
Specifies the order in which data is addressed in synchronous burst
mode:
0 = Interleaved
1 = Linear (Default)
Defines the clock edge on which the BURST operation starts and
data is referenced:
0 = Falling edge
1 = Rising edge (Default)
Default = 0
0 = Burst wraps within the burst length
1 = Burst no wrap (Default)
Sets the number of words the device will output in burst mode:
001 = 4 words
010 = 8 words
111 = Continuous burst (Default)
LC1
12
R
4
Table 8
ASYNC/PAGE/BURST FLASH MEMORY
21
LC0
BW
11
3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
BL2
10
R
2
HDO
BL1
9
1
2 MEG x 16
©2002, Micron Technology, Inc.
BL0
WC
8
0