AN2184 Freescale Semiconductor / Motorola, AN2184 Datasheet - Page 23

• Manufacturer Part Number: AN2184
• Description: MCF5272 Interrupt Service Routine for the Physical Layer Interface Controller
• Manufacturer: Freescale Semiconductor / Motorola

For more explanation about the meaning of those bits, the user should read the MCF5272 User’s Manual.
Here is a brief summary ICRx bits:
xPIR: When set to one, the new IPL value is stored. When set to zero, the corresponding INTx interrupt
latch and IPL level is unaffected. Any pending interrupt on that line will remain pending.
xIPL(2:0): Interrupt Priority Level (1-7): When set to zero, the corresponding INTx interrupt line is
inhibited and will not generate interrupts. Its state can still be read via the ISR1 register. Otherwise, the
corresponding INT1x interrupt line is enabled, and will generate an interrupt to the MCF52xx core with the
indicated priority level.
For more explanation about the meaning of these bits, see the MCF5272 User’s Manual.
7.4 Programmable Interrupt Vector Register: PIVR
This register specifies the vector numbers which will be returned by the interrupt controller in response to
interrupt acknowledge cycles for the various peripherals and discrete interrupt sources. The high three bits
of the vector number are programmed in the PIVR. The low five bits are provided by the interrupt
controller depending on the highest priority source which is currently active for the specific interrupt
priority level (IPL) being responded to in the current acknowledge cycle.
Reset
Reset
Read
Write USB0PIR
Reset
Write UART1PIR UART1PL2 UART1/PL1 UART1/PL0 UART2PIR UART2/PL2 UART2/PL1 UART2PL0
Read
Read
Write USB2PIR USB2IPL2 USB2IPL1 USB2IPL0 USB3PIR USB3IPL2 USB2IPL1 USB2IPL0
Reset
Read
Write PLIPIR
UART1
USB0
ISB2
15
31
PLIP
7
23
UART1PL2 UART1/PL1 UART1/PL0
USB0IPL2
USB0IPL2
USB2IPL2 USB2IPL1 USB2IPL0
PLIIPL2
PLIIPL2
14
30
22
6
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 18. Interrupt Controller Register 2
MCF5272 Interrupt Service Routine
ISB0IPL1
ISB0IPL1
PLIIPL1
PLIIPL1
21
13
29
Assembly Code Programmable Interrupt Vector Register: PIVR
5
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PLIPL0
PLIPL0
USB0IPL0
USB0IPL0
20
12
28
4
0000_0000
0000_0000
0000_0000
0000_0000
PLIAPIR
PLIA
USB1PIR
19
UART2
USB1
USB3
11
27
3
PLIAIPL2
PLIAIPL2
UART2/PL2 UART2/PL1 UART2PL0
USB1IPL2
USB1IPL2
USB3IPL2 USB2IPL1 USB2IPL0
18
10
26
2
PLIAIPL1
PLIAIPL1
USB1IPL1
USB1IPL1
17
25
9
1
MBASE +0x24
PLIAIPL0
PLIAIPL0
USB0IPL0
USB0IPL0
16
24
0
8
23