AN2184 Freescale Semiconductor / Motorola, AN2184 Datasheet - Page 5

• Manufacturer Part Number: AN2184
• Description: MCF5272 Interrupt Service Routine for the Physical Layer Interface Controller
• Manufacturer: Freescale Semiconductor / Motorola

For more information about the different configurations of IDL, please refer to any ISDN product user’s
manual, such as the MC145574/572 or MC145576 at http://www.motorola.com/semiconductors.
Part III General Circuit Interface Mode of
Operation
3.1 GCI History
The GCI mode was defined by European companies (Italtel, Siemens, Alcatel, and GPT). GCI is a time
division multiplex (TDM) bus that combines the ISDN 2B+D data, control, and status information onto
four signal pins. Some benefits of the GCI include the following:
Those four signals consist of the following:
The GCI frame structure has the following format: two B channels, a monitor channel, the ISDN D
channel, the command/indicate channel, and the A and E bits. The frame is shown in Figure 3.
Frame Sync (FSC)
Data Clock (DCL)
Data In (Din)
Data Out (Dout)
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The 8-bit mode:
Operation and maintenance features
Activation and deactivation facilities (via CI channel)
Well-defined transmission protocols to ensure correct information transfer between
GCI-compatible devices
Point-to-point and multi-point communication links
Multiplexed mode of operation where up to eight GCI channels can be combined to form a single
data stream
FSC, frame synchronization: 8-kHz frame pulse
DCL, data, clock signal: two clocks per data bit
Din, data in: the data in
Dout, data out: This pin is an open-drain output and must be pulled to Vdd through a 1.2-k Ω
resistor.
Freescale Semiconductor, Inc.
B1 Channel
For More Information On This Product,
MCF5272 Interrupt Service Routine
Go to: www.freescale.com
Figure 2. IDL 8-bit Mode
B2 Channel
General Circuit Interface Mode of Operation GCI History
D Channel
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