IDT72V3644L10PF IDT, Integrated Device Technology Inc, IDT72V3644L10PF Datasheet - Page 23

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IDT72V3644L10PF

Manufacturer Part Number
IDT72V3644L10PF
Description
IC FIFO 2048X36 10NS 128QFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
72Vr
Datasheet

Specifications of IDT72V3644L10PF

Function
Asynchronous, Synchronous
Memory Size
72K (2K x 36)
Data Rate
100MHz
Access Time
10ns
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72V3644L10PF

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT72V3644L10PF
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT72V3644L10PF8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
NOTES:
1. t
2. If Port B size is word or byte, ORB is set LOW by the last word or byte read from FIFO1, respectively.
IDT72V3624/72V3634/72V3644 3.3V CMOS SyncBiFIFO
256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2
A0-A35
B0-B35
W/RA
CLKA
CLKB
If the time between the rising CLKA edge and rising CLKB edge is less than t
cycle later than shown.
W/RB
SKEW1
MBA
MBB
ORB
CSA
ENA
CSB
ENB
IRA
is the minimum time between a rising CLKA edge and a rising CLKB edge for ORB to transition HIGH and to clock the next word to the FIFO1 output register in three CLKB cycles.
FIFO1 Empty
HIGH
HIGH
LOW
HIGH
LOW
LOW
t
t
Figure 15. ORB Flag Timing and First Data Word Fall Through when FIFO1 is Empty (FWFT Mode)
ENS2
ENS2
t
DS
W1
Old Data in FIFO1 Output Register
t
SKEW1
t
ENH
t
t
ENH
DH
(1)
t
CLKH
1
t
CLK
t
CLKL
TM
SKEW1
WITH BUS-MATCHING
, then the transition of ORB HIGH and load of the first word to the output register may occur one CLKB
23
2
t
CLKH
t
CLK
t
CLKL
t
REF
3
t
A
t
ENS2
COMMERCIAL TEMPERATURE RANGE
t
REF
t
ENH
W1
4664 drw17

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