s908ey8ad4cfjer Freescale Semiconductor, Inc, s908ey8ad4cfjer Datasheet - Page 161

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s908ey8ad4cfjer

Manufacturer Part Number
s908ey8ad4cfjer
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
14.5.1 Interrupts
At the beginning of an interrupt, the CPU saves the CPU register contents on the stack and sets the
interrupt mask (I bit) to prevent additional interrupts. At the end of an interrupt, the return-from-interrupt
(RTI) instruction recovers the CPU register contents from the stack so that normal processing can
resume.
Interrupts are latched, and arbitration is performed in the SIM at the start of interrupt processing. The
arbitration result is a constant that the CPU uses to determine which vector to fetch. As shown in
Figure
of priority, until the latched interrupt is serviced or the I bit is cleared.
Freescale Semiconductor
INTERRUPT
INTERRUPT
MODULE
I BIT
I BIT
R/W
R/W
IDB
IDB
IAB
IAB
MODULE
14-9, once an interrupt is latched by the SIM, no other interrupt can take precedence, regardless
Figure 14-7
DUMMY
DUMMY
shows interrupt entry timing.
SP – 4
SP
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
PC – 1[7:0] PC – 1[15:8]
CCR
SP – 1
SP – 3
Figure 14-8. Interrupt Recovery
Figure 14-7
A
SP – 2
SP – 2
X
X
.
Figure 14-8
SP – 3
SP – 1
Interrupt Entry
PC – 1 [7:0] PC – 1 [15:8] OPCODE
A
SP – 4
SP
shows interrupt recovery timing.
CCR
VECT H
PC
V DATA H
VECT L
PC + 1
OPERAND
V DATA L
Program Exception Control
START ADDR
OPCODE
161

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