s908ey8ad4cfjer Freescale Semiconductor, Inc, s908ey8ad4cfjer Datasheet - Page 191

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s908ey8ad4cfjer

Manufacturer Part Number
s908ey8ad4cfjer
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
16.5 TBM Interrupt Rate
The interrupt rate is determined by the equation:
where:
As an example, a clock source of 4.9152 MHz and the TBR2–TBR0 set to {011}, the divider tap is 128
and the interrupt rate calculates to 128/4.9152 x 10
16.6 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power-consumption standby modes.
16.6.1 Wait Mode
The timebase module remains active after execution of the WAIT instruction. In wait mode the timebase
register is not accessible by the CPU.
If the timebase functions are not required during wait mode, reduce the power consumption by stopping
the timebase before executing the WAIT instruction.
16.6.2 Stop Mode
The timebase module may remain active after execution of the STOP instruction if the internal clock
generator has been enabled to operate during stop mode through the OSCENINSTOP bit in the
configuration register. The timebase module can be used in this mode to generate a periodic wake up
from stop mode.
Freescale Semiconductor
f
Divider = Divider value as determined by TBR2–TBR0 settings.
TBMCLK
=Frequency supplied from the internal clock generator (ICG) module
See
1. Do not change TBR2–TBR0 bits while the timebase is enabled (TBON = 1).
Table 16-1
TBR2
0
0
0
0
1
1
1
1
(1)
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
TBR1
Table 16-1. Timebase Divider Selection
0
0
1
1
0
0
1
1
(1)
t
TBMRATE
TBR0
0
1
0
1
0
1
0
1
=
(1)
----------------------- -
f
TBMRATE
6
1
= 26 µs.
32,768
=
8192
2048
128
64
32
16
0
8
-------------------- -
f
Divider
TBMCLK
TMBCLKSEL
Divider Tap
4,194,304
1,048,576
262144
16,384
8192
4096
2048
1024
1
TBM Interrupt Rate
191

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