s908ey8ad4cfjer Freescale Semiconductor, Inc, s908ey8ad4cfjer Datasheet - Page 220

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s908ey8ad4cfjer

Manufacturer Part Number
s908ey8ad4cfjer
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Timer Interface B (TIMB) Module
18.8.4 TIMB Channel Status and Control Registers
Each of the TIMB channel status and control registers:
CHxF — Channel x Flag Bit
CHxIE — Channel x Interrupt Enable Bit
MSxB — Mode Select Bit B
220
When channel x is an input capture channel, this read/write bit is set when an active edge occurs on
the channel x pin. When channel x is an output compare channel, CHxF is set when the value in the
TIMB counter registers matches the value in the TIMB channel x registers.
When CHxIE = 1, clear CHxF by reading TIMB channel x status and control register with CHxF set,
and then writing a 0 to CHxF. If another interrupt request occurs before the clearing sequence is
complete, then writing 0 to CHxF has no effect. Therefore, an interrupt request cannot be lost due to
inadvertent clearing of CHxF.
Reset clears the CHxF bit. Writing a 1 to CHxF has no effect.
This read/write bit enables TIMB CPU interrupts on channel x.
Reset clears the CHxIE bit.
This read/write bit selects buffered output compare/PWM operation. MSxB exists only in the TIMB
channel 0.
1 = Input capture or output compare on channel x
0 = No input capture or output compare on channel x
1 = Channel x CPU interrupt requests enabled
0 = Channel x CPU interrupt requests disabled
Flags input captures and output compares
Enables input capture and output compare interrupts
Selects input capture, output compare, or PWM operation
Selects high, low, or toggling output on output compare
Selects rising edge, falling edge, or any edge as the active input capture trigger
Selects output toggling on TIMB overflow
Selects 0% and 100% PWM duty cycle
Selects buffered or unbuffered output compare/PWM operation
Register Name and Address
Register Name and Address
Reset:
Reset:
Read:
Read:
Write:
Write:
Figure 18-7. TIMB Channel Status and Control Registers
CH0F
CH1F
Bit 7
Bit 7
R
0
0
0
0
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
= Reserved
CH0IE
CH1IE
6
0
6
0
TBSC0 — $0030
TBSC1 — $0033
MS0B
5
0
5
0
R
0
(TBSC0–TBSC1)
MS0A
MS1A
4
0
4
0
ELS0B
ELS1B
3
0
3
0
ELS0A
ELS1A
2
0
2
0
TOV0
TOV1
1
0
1
0
Freescale Semiconductor
CH0MAX
CH1MAX
Bit 0
Bit 0
0
0

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